DarwinDumper Report Version: 3.0.4
Friday 25 May 2018
Mac Model: MacPro3,1
CPU: Intel(R) Core(TM)2 Quad CPU Q6700 @ 2.66GHz
Memory: 8 GB 800 MHz DDR2 SDRAM
Video: NVIDIA GeForce GTX 670 [10de:1189] Rev.[00a2]
Audio: NVidia [Unknown] [10de:0040]
Audio: Realtek ALC898 [10ec:0899]
Operating System
ElCapitan
10.11.6 (15G18013)
SIP: 0x00000067
Note: A complete dump contains more information than shown in this .htm report. If submitting a report for help then please supply the containing directory, not just this file.

### ACPI Tables

- APIC
- DSDT
- FACP
- FACS
- HPET
- MCFG
- OEMB
- OSFR
- RSDT
- SSDT-1
- SSDT-2
- SSDT

Multiple APIC Description Table

View File APIC.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/APIC.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [APIC]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]

[004h 0004 4] Table Length : 0000006C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 58

[00Ah 0010 6] Oem ID : "A_M_I_"

[010h 0016 8] Oem Table ID : "OEMAPIC "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 4] Local Apic Address : FEE00000

[028h 0040 4] Flags (decoded below) : 00000001

PC-AT Compatibility : 1

[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]

[02Dh 0045 1] Length : 08

[02Eh 0046 1] Processor ID : 01

[02Fh 0047 1] Local Apic ID : 00

[030h 0048 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[034h 0052 1] Subtable Type : 00 [Processor Local APIC]

[035h 0053 1] Length : 08

[036h 0054 1] Processor ID : 02

[037h 0055 1] Local Apic ID : 01

[038h 0056 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC]

[03Dh 0061 1] Length : 08

[03Eh 0062 1] Processor ID : 03

[03Fh 0063 1] Local Apic ID : 02

[040h 0064 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[044h 0068 1] Subtable Type : 00 [Processor Local APIC]

[045h 0069 1] Length : 08

[046h 0070 1] Processor ID : 04

[047h 0071 1] Local Apic ID : 03

[048h 0072 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[04Ch 0076 1] Subtable Type : 01 [I/O APIC]

[04Dh 0077 1] Length : 0C

[04Eh 0078 1] I/O Apic ID : 04

[04Fh 0079 1] Reserved : 00

[050h 0080 4] Address : FEC00000

[054h 0084 4] Interrupt : 00000000

[058h 0088 1] Subtable Type : 02 [Interrupt Source Override]

[059h 0089 1] Length : 0A

[05Ah 0090 1] Bus : 00

[05Bh 0091 1] Source : 00

[05Ch 0092 4] Interrupt : 00000002

[060h 0096 2] Flags (decoded below) : 0000

Polarity : 0

Trigger Mode : 0

[062h 0098 1] Subtable Type : 02 [Interrupt Source Override]

[063h 0099 1] Length : 0A

[064h 0100 1] Bus : 00

[065h 0101 1] Source : 09

[066h 0102 4] Interrupt : 00000009

[06Ah 0106 2] Flags (decoded below) : 000D

Polarity : 1

Trigger Mode : 3

Raw Table Data: Length 108 (0x6C)

0000: 41 50 49 43 6C 00 00 00 01 58 41 5F 4D 5F 49 5F // APICl....XA_M_I_

0010: 4F 45 4D 41 50 49 43 20 13 09 00 04 4D 53 46 54 // OEMAPIC ....MSFT

0020: 97 00 00 00 00 00 E0 FE 01 00 00 00 00 08 01 00 // ................

0030: 01 00 00 00 00 08 02 01 01 00 00 00 00 08 03 02 // ................

0040: 01 00 00 00 00 08 04 03 01 00 00 00 01 0C 04 00 // ................

0050: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................

0060: 00 00 02 0A 00 09 09 00 00 00 0D 00 // ............

Differentiated System Description Table

View File DSDT.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembling to symbolic ASL+ operators

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/DSDT.aml, Fri May 25 11:52:47 2018

*

* Original Table Header:

* Signature "DSDT"

* Length 0x0000A8F2 (43250)

* Revision 0x01 **** 32-bit table (V1), no 64-bit math support

* Checksum 0x87

* OEM ID "A1007"

* OEM Table ID "A1007001"

* OEM Revision 0x00000001 (1)

* Compiler ID "INTL"

* Compiler Version 0x20060113 (537264403)

*/

DefinitionBlock ("", "DSDT", 1, "A1007", "A1007001", 0x00000001)

{

Name (VER0, "Clover autopatched")

Name (WXP1, "Windows 2001")

Method (GET9, 2, NotSerialized)

{

CreateByteField (Arg0, Arg1, TCH9)

Return (TCH9) /* \GET9.TCH9 */

}

Method (STR9, 2, NotSerialized)

{

Name (STR8, Buffer (0x50) {})

Name (STR9, Buffer (0x50) {})

STR8 = Arg0

STR9 = Arg1

Local0 = Zero

Local1 = One

While (Local1)

{

Local1 = GET9 (STR8, Local0)

Local2 = GET9 (STR9, Local0)

If (Local1 != Local2)

{

Return (Zero)

}

Local0++

}

Return (One)

}

Method (OOSI, 1, NotSerialized)

{

If (STR9 (WXP1, Arg0))

{

Return (One)

}

Return (Zero)

}

Scope (_PR)

{

Processor (P001, 0x01, 0x00000810, 0x06) {}

Alias (P001, CPU1)

Processor (P002, 0x02, 0x00000000, 0x00) {}

Alias (P002, CPU2)

Processor (P003, 0x03, 0x00000000, 0x00) {}

Alias (P003, CPU3)

Processor (P004, 0x04, 0x00000000, 0x00) {}

Alias (P004, CPU4)

}

Name (DP80, 0x80)

Name (DP90, 0x90)

Name (WKTP, Zero)

Name (SPIO, 0x2E)

Name (IOHW, 0x0290)

Name (IOSB, Zero)

Name (IOSL, 0x10)

Name (IOHB, 0x0290)

Name (IOHL, 0x10)

Name (PMBS, 0x0800)

Name (PMLN, 0x80)

Name (GPBS, 0x0500)

Name (GPLN, 0x80)

Name (SMBL, Zero)

Name (PM30, 0x0830)

Name (SUSW, 0xFF)

Name (APIC, One)

Name (SMIP, 0xB2)

Name (PCIB, 0xE0000000)

Name (PCIL, 0x10000000)

Name (SMBS, 0x0400)

Name (CPUC, 0x04)

OperationRegion (BIOS, SystemMemory, 0xCFF8E064, 0xFF)

Field (BIOS, ByteAcc, NoLock, Preserve)

{

SS1, 1,

SS2, 1,

SS3, 1,

SS4, 1,

Offset (0x01),

IOST, 16,

TOPM, 32,

ROMS, 32,

MG1B, 32,

MG1L, 32,

MG2B, 32,

MG2L, 32,

Offset (0x1C),

CPB0, 32,

CPB1, 32,

CPB2, 32,

CPB3, 32,

ASSB, 8,

AOTB, 8,

AAXB, 32,

SMIF, 8,

DTSE, 8,

DTS1, 8,

DTS2, 8,

MPEN, 8,

TPMF, 8,

MSC1, 32,

MSC2, 32,

MSC3, 32,

MSC4, 32,

MSC5, 32,

MSC6, 32,

MSC7, 32,

MSC8, 32,

DMAX, 8,

HPTA, 32

}

Method (RRIO, 4, NotSerialized)

{

Debug = "RRIO"

}

Method (RDMA, 3, NotSerialized)

{

Debug = "rDMA"

}

Name (PICM, Zero)

Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model

{

If (Arg0)

{

DBG8 = 0xAA

}

Else

{

DBG8 = 0xAC

}

PICM = Arg0

}

Name (OSVR, Ones)

Method (OSFL, 0, NotSerialized)

{

If (OSVR != Ones)

{

Return (OSVR) /* \OSVR */

}

If (PICM == Zero)

{

DBG8 = 0xAC

}

OSVR = One

If (CondRefOf (OOSI, Local1))

{

If (OOSI ("Windows 2000"))

{

OSVR = 0x04

}

If (OOSI ("Windows 2001"))

{

OSVR = Zero

}

If (OOSI ("Windows 2001 SP1"))

{

OSVR = Zero

}

If (OOSI ("Windows 2001 SP2"))

{

OSVR = Zero

}

If (OOSI ("Windows 2001.1"))

{

OSVR = Zero

}

If (OOSI ("Windows 2001.1 SP1"))

{

OSVR = Zero

}

If (OOSI ("Windows 2006"))

{

OSVR = Zero

}

}

ElseIf (MCTH (_OS, "Microsoft Windows NT"))

{

OSVR = 0x04

}

Else

{

If (MCTH (_OS, "Microsoft WindowsME: Millennium Edition"))

{

OSVR = 0x02

}

If (MCTH (_OS, "Linux"))

{

OSVR = 0x03

}

}

Return (OSVR) /* \OSVR */

}

Method (MCTH, 2, NotSerialized)

{

If (SizeOf (Arg0) < SizeOf (Arg1))

{

Return (Zero)

}

Local0 = (SizeOf (Arg0) + One)

Name (BUF0, Buffer (Local0) {})

Name (BUF1, Buffer (Local0) {})

BUF0 = Arg0

BUF1 = Arg1

While (Local0)

{

Local0--

If (DerefOf (BUF0 [Local0]) != DerefOf (BUF1 [Local0]

))

{

Return (Zero)

}

}

Return (One)

}

Name (PRWP, Package (0x02)

{

Zero,

Zero

})

Method (GPRW, 2, NotSerialized)

{

PRWP [Zero] = Arg0

Local0 = (SS1 << One)

Local0 |= (SS2 << 0x02)

Local0 |= (SS3 << 0x03)

Local0 |= (SS4 << 0x04)

If ((One << Arg1) & Local0)

{

PRWP [One] = Arg1

}

Else

{

Local0 >>= One

If ((OSFL () == One) || (OSFL () == 0x02))

{

FindSetLeftBit (Local0, PRWP [One])

}

Else

{

FindSetRightBit (Local0, PRWP [One])

}

}

Return (PRWP) /* \PRWP */

}

Name (WAKP, Package (0x02)

{

Zero,

Zero

})

OperationRegion (DEB0, SystemIO, DP80, One)

Field (DEB0, ByteAcc, NoLock, Preserve)

{

DBG8, 8

}

OperationRegion (DEB1, SystemIO, DP90, 0x02)

Field (DEB1, WordAcc, NoLock, Preserve)

{

DBG9, 16

}

Scope (_SB)

{

Name (PR00, Package (0x1B)

{

Package (0x04)

{

0x0001FFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0x0001FFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0x0001FFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0x0001FFFF,

0x03,

LNKD,

Zero

},

Package (0x04)

{

0x0006FFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0x0006FFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0x0006FFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0x0006FFFF,

0x03,

LNKD,

Zero

},

Package (0x04)

{

0x001FFFFF,

Zero,

LNKC,

Zero

},

Package (0x04)

{

0x001FFFFF,

One,

LNKD,

Zero

},

Package (0x04)

{

0x001FFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0x001DFFFF,

Zero,

LNKH,

Zero

},

Package (0x04)

{

0x001AFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0x001BFFFF,

Zero,

LNKG,

Zero

},

Package (0x04)

{

0x0019FFFF,

Zero,

LNKE,

Zero

},

Package (0x04)

{

0x0019FFFF,

One,

LNKF,

Zero

},

Package (0x04)

{

0x001DFFFF,

One,

LNKD,

Zero

},

Package (0x04)

{

0x001DFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0x001DFFFF,

0x03,

LNKA,

Zero

},

Package (0x04)

{

0x001AFFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0x001AFFFF,

One,

LNKF,

Zero

},

Package (0x04)

{

0x0002FFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0x0002FFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0x001CFFFF,

Zero,

LNKB,

Zero

},

Package (0x04)

{

0x001CFFFF,

One,

LNKA,

Zero

},

Package (0x04)

{

0x001CFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0x001CFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR00, Package (0x1B)

{

Package (0x04)

{

0x0001FFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0x0001FFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0x0001FFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0x0001FFFF,

0x03,

Zero,

0x13

},

Package (0x04)

{

0x0006FFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0x0006FFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0x0006FFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0x0006FFFF,

0x03,

Zero,

0x13

},

Package (0x04)

{

0x001FFFFF,

Zero,

Zero,

0x12

},

Package (0x04)

{

0x001FFFFF,

One,

Zero,

0x13

},

Package (0x04)

{

0x001FFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0x001DFFFF,

Zero,

Zero,

0x17

},

Package (0x04)

{

0x001AFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0x001BFFFF,

Zero,

Zero,

0x16

},

Package (0x04)

{

0x0019FFFF,

Zero,

Zero,

0x14

},

Package (0x04)

{

0x0019FFFF,

One,

Zero,

0x15

},

Package (0x04)

{

0x001DFFFF,

One,

Zero,

0x13

},

Package (0x04)

{

0x001DFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0x001DFFFF,

0x03,

Zero,

0x10

},

Package (0x04)

{

0x001AFFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0x001AFFFF,

One,

Zero,

0x15

},

Package (0x04)

{

0x0002FFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0x0002FFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0x001CFFFF,

Zero,

Zero,

0x11

},

Package (0x04)

{

0x001CFFFF,

One,

Zero,

0x10

},

Package (0x04)

{

0x001CFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0x001CFFFF,

0x03,

Zero,

0x13

}

})

Name (PR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR03, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR03, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR05, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR05, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR06, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR06, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR07, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR07, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x13

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR01, Package (0x09)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

},

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

},

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

},

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

},

Package (0x04)

{

0x0001FFFF,

Zero,

LNKB,

Zero

},

Package (0x04)

{

0x0001FFFF,

One,

LNKC,

Zero

},

Package (0x04)

{

0x0001FFFF,

0x02,

LNKD,

Zero

},

Package (0x04)

{

0x0001FFFF,

0x03,

LNKA,

Zero

},

Package (0x04)

{

0x0003FFFF,

Zero,

LNKD,

Zero

}

})

Name (AR01, Package (0x09)

{

Package (0x04)

{

0xFFFF,

Zero,

Zero,

0x10

},

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

},

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

},

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

},

Package (0x04)

{

0x0001FFFF,

Zero,

Zero,

0x11

},

Package (0x04)

{

0x0001FFFF,

One,

Zero,

0x12

},

Package (0x04)

{

0x0001FFFF,

0x02,

Zero,

0x13

},

Package (0x04)

{

0x0001FFFF,

0x03,

Zero,

0x10

},

Package (0x04)

{

0x0003FFFF,

Zero,

Zero,

0x13

}

})

Name (PRSA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{3,4,5,6,7,10,11,12,14,15}

})

Alias (PRSA, PRSB)

Alias (PRSA, PRSC)

Alias (PRSA, PRSD)

Alias (PRSA, PRSE)

Alias (PRSA, PRSF)

Alias (PRSA, PRSG)

Alias (PRSA, PRSH)

Device (PCI0)

{

Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID

Name (_ADR, Zero) // _ADR: Address

Method (^BN00, 0, NotSerialized)

{

Return (Zero)

}

Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number

{

Return (BN00 ())

}

Name (_UID, Zero) // _UID: Unique ID

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR00) /* \_SB_.AR00 */

}

Return (PR00) /* \_SB_.PR00 */

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID

Device (MCH)

{

Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID

Name (_UID, 0x0A) // _UID: Unique ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

Memory32Fixed (ReadWrite,

0xFED14000, // Address Base

0x00006000, // Address Length

)

})

}

Method (NPTS, 1, NotSerialized)

{

}

Method (NWAK, 1, NotSerialized)

{

}

Device (P0P2)

{

Name (_ADR, 0x00010000) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR02) /* \_SB_.AR02 */

}

Return (PR02) /* \_SB_.PR02 */

}

}

Device (P0P3)

{

Name (_ADR, 0x00060000) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR03) /* \_SB_.AR03 */

}

Return (PR03) /* \_SB_.PR03 */

}

Device (GFX0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

Name (_SUN, 0x00000001) // _SUN: Slot User Number

}

Device (HDAU)

{

Name (_ADR, One) // _ADR: Address

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x06)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

},

"layout-id",

Unicode ("\x01"),

"PinConfigurations",

Buffer (0x04)

{

0xE0, 0x00, 0x56, 0x28 /* ..V( */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

}

Device (P0P1)

{

Name (_ADR, 0x001E0000) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0B, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR01) /* \_SB_.AR01 */

}

Return (PR01) /* \_SB_.PR01 */

}

Device (FRWR)

{

Name (_ADR, 0x00030000) // _ADR: Address

Name (_GPE, 0x1A) // _GPE: General Purpose Events

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x02)

{

"fwhub",

Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00 /* .... */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

Name (_SUN, 0x00000003) // _SUN: Slot User Number

}

}

Device (SBRG)

{

Name (_ADR, 0x001F0000) // _ADR: Address

Device (IELK)

{

Name (_HID, "AWY0001") // _HID: Hardware ID

OperationRegion (RXA0, PCI_Config, 0xA0, 0x20)

Field (RXA0, ByteAcc, NoLock, Preserve)

{

, 9,

PBLV, 1,

Offset (0x10),

, 1,

PBMS, 1,

, 1,

PMCS, 1,

ECNS, 1,

Offset (0x11),

ECT1, 16,

ELEN, 1,

Offset (0x14)

}

Method (\_GPE._L0A, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.SBRG.IELK, 0x81) // Information Change

\_SB.PCI0.SBRG.IELK.PMCS = One

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (ELEN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

}

Method (SMOD, 1, NotSerialized)

{

}

Method (GPBS, 0, NotSerialized)

{

Return ((PBLV ^ One))

}

}

Method (SPTS, 1, NotSerialized)

{

PS1S = One

PS1E = One

SLPS = One

}

Method (SWAK, 1, NotSerialized)

{

SLPS = Zero

PS1E = Zero

If ((Arg0 == One) && RTCS) {}

ElseIf ((Arg0 == 0x03) && BRTC) {}

Else

{

Notify (PWRB, 0x02) // Device Wake

}

}

OperationRegion (APMP, SystemIO, SMIP, 0x02)

Field (APMP, ByteAcc, NoLock, Preserve)

{

APMC, 8,

APMS, 8

}

Field (APMP, ByteAcc, NoLock, Preserve)

{

Offset (0x01),

, 1,

BRTC, 1

}

OperationRegion (PMS0, SystemIO, PMBS, 0x04)

Field (PMS0, ByteAcc, NoLock, Preserve)

{

, 10,

RTCS, 1,

, 4,

WAKS, 1,

Offset (0x03),

PWBT, 1,

Offset (0x04)

}

OperationRegion (SMIE, SystemIO, PM30, 0x08)

Field (SMIE, ByteAcc, NoLock, Preserve)

{

, 4,

PS1E, 1,

, 31,

PS1S, 1,

Offset (0x08)

}

Scope (\_SB)

{

Name (SLPS, Zero)

}

Device (PIC)

{

Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0020, // Range Minimum

0x0020, // Range Maximum

0x00, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A0, // Range Minimum

0x00A0, // Range Maximum

0x00, // Alignment

0x02, // Length

)

})

}

Device (DMAD)

{

Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

DMA (Compatibility, BusMaster, Transfer8, )

{4}

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x10, // Length

)

IO (Decode16,

0x0081, // Range Minimum

0x0081, // Range Maximum

0x00, // Alignment

0x03, // Length

)

IO (Decode16,

0x0087, // Range Minimum

0x0087, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0089, // Range Minimum

0x0089, // Range Maximum

0x00, // Alignment

0x03, // Length

)

IO (Decode16,

0x008F, // Range Minimum

0x008F, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x00C0, // Range Minimum

0x00C0, // Range Maximum

0x00, // Alignment

0x20, // Length

)

})

}

Device (TMR)

{

Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0040, // Range Minimum

0x0040, // Range Maximum

0x00, // Alignment

0x04, // Length

)

})

}

Device (RTC0)

{

Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0070, // Range Minimum

0x0070, // Range Maximum

0x00, // Alignment

0x02, // Length

)

})

}

Device (COPR)

{

Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x00F0, // Range Minimum

0x00F0, // Range Maximum

0x00, // Alignment

0x10, // Length

)

IRQNoFlags ()

{13}

})

}

Device (FDC)

{

Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID

Method (_FDE, 0, NotSerialized) // _FDE: Floppy Disk Enumerate

{

Name (FDEP, Package (0x05)

{

Zero,

Zero,

0x02,

0x02,

0x02

})

If (_STA ())

{

FDEP [Zero] = One

}

Return (FDEP) /* \_SB_.PCI0.SBRG.FDC_._FDE.FDEP */

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (DSTA (0x03))

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

DCNT (0x03, Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

DCRS (0x03, One)

IRQE = IRQM /* \_SB_.PCI0.SBRG.IRQM */

DMAE = DMAM /* \_SB_.PCI0.SBRG.DMAM */

IO21 = IO11 /* \_SB_.PCI0.SBRG.IO11 */

IO22 = IO12 /* \_SB_.PCI0.SBRG.IO12 */

LEN2 = 0x06

IO31 = (IO21 + 0x07)

IO32 = IO31 /* \_SB_.PCI0.SBRG.IO31 */

LEN3 = One

Return (CRS2) /* \_SB_.PCI0.SBRG.CRS2 */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

DSRS (Arg0, 0x03)

CreateWordField (Arg0, 0x11, IRQE)

CreateByteField (Arg0, 0x14, DMAE)

ENFG (CGLD (0x03))

If (IRQE)

{

FindSetRightBit (IRQE, Local0)

INTR = (Local0 - One)

}

Else

{

INTR = Zero

}

If (DMAE)

{

FindSetRightBit (DMAE, Local0)

DMCH = (Local0 - One)

}

Else

{

DMCH = 0x04

}

EXFG ()

}

Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings

{

StartDependentFn (0x00, 0x00)

{

IO (Decode16,

0x03F0, // Range Minimum

0x03F0, // Range Maximum

0x01, // Alignment

0x06, // Length

)

IO (Decode16,

0x03F7, // Range Minimum

0x03F7, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IRQNoFlags ()

{6}

DMA (Compatibility, NotBusMaster, Transfer8, )

{2}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x03F0, // Range Minimum

0x03F0, // Range Maximum

0x01, // Alignment

0x06, // Length

)

IO (Decode16,

0x03F7, // Range Minimum

0x03F7, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IRQNoFlags ()

{3,4,5,6,7,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{0,1,2,3}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x0370, // Range Minimum

0x0370, // Range Maximum

0x01, // Alignment

0x06, // Length

)

IO (Decode16,

0x0377, // Range Minimum

0x0377, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IRQNoFlags ()

{3,4,5,6,7,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{0,1,2,3}

}

EndDependentFn ()

})

}

Device (SIOR)

{

Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID

Method (_UID, 0, NotSerialized) // _UID: Unique ID

{

Return (SPIO) /* \SPIO */

}

Name (CRS, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y00)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y01)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y02)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If ((SPIO != 0x03F0) && (SPIO > 0xF0))

{

CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MIN, GP10) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MAX, GP11) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._LEN, GPL1) // _LEN: Length

GP10 = SPIO /* \SPIO */

GP11 = SPIO /* \SPIO */

GPL1 = 0x02

}

If (IOSB)

{

CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MIN, GP20) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MAX, GP21) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._LEN, GPL2) // _LEN: Length

GP20 = IOSB /* \IOSB */

GP21 = IOSB /* \IOSB */

GPL2 = IOSL /* \IOSL */

}

If (IOHB)

{

CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MIN, GP30) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MAX, GP31) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._LEN, GPL3) // _LEN: Length

GP30 = IOHB /* \IOHB */

GP31 = IOHB /* \IOHB */

GPL3 = IOHL /* \IOHL */

}

Return (CRS) /* \_SB_.PCI0.SBRG.SIOR.CRS_ */

}

}

Name (DCAT, Package (0x16)

{

0x02,

0x03,

One,

Zero,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0xFF,

0x06,

0x09,

0xFF,

0xFF,

0xFF,

0xFF

})

Method (ENFG, 1, NotSerialized)

{

INDX = 0x87

INDX = 0x87

LDN = Arg0

}

Method (EXFG, 0, NotSerialized)

{

INDX = 0xAA

}

Method (LPTM, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

Local0 = (OPT0 & 0x02)

EXFG ()

Return (Local0)

}

Method (UHID, 1, NotSerialized)

{

If (Arg0 == One)

{

ENFG (CGLD (Arg0))

Local0 = (OPT1 & 0x38)

EXFG ()

If (Local0)

{

Return (0x1005D041)

}

}

Return (0x0105D041)

}

Method (SIOK, 1, NotSerialized)

{

ENFG (0x0A)

OPT3 &= 0xFF /* \_SB_.PCI0.SBRG.OPT3 */

Local0 = (Arg0 & One)

OPT2 |= Local0

ACTR = (Arg0 & One)

EXFG ()

}

Name (KBFG, One)

Name (MSFG, One)

Name (U1FG, One)

Name (U2FG, One)

OperationRegion (KBRW, SystemIO, 0x60, 0x05)

Field (KBRW, ByteAcc, NoLock, Preserve)

{

KP60, 8,

Offset (0x04),

KP64, 8

}

OperationRegion (KB64, SystemIO, 0x64, One)

Field (KB64, ByteAcc, NoLock, Preserve)

{

, 1,

KRDY, 1,

Offset (0x01)

}

Method (SIOS, 1, NotSerialized)

{

Debug = "SIOS"

CRE0 &= 0x1F

If (Arg0 == One)

{

SIOK (Ones)

ENFG (0x0A)

If (KBFG)

{

OPT6 |= 0x10

}

If (MSFG)

{

OPT6 |= 0x20

}

EXFG ()

}

If ((Arg0 == 0x03) || (Arg0 == 0x04))

{

If (WKTP)

{

SIOK (Ones)

ENFG (0x0A)

If (KBFG)

{

OPT6 |= 0x10

}

If (MSFG)

{

OPT6 |= 0x20

}

EXFG ()

}

Else

{

ENFG (0x0A)

If (KBFG)

{

CRE0 |= 0x41

}

If (MSFG)

{

CRE0 |= 0x22

CRE6 |= 0x80

}

EXFG ()

}

}

}

Method (SIOW, 1, NotSerialized)

{

Debug = "SIOW"

SIOK (Zero)

ENFG (0x0A)

OPT6 &= 0xCF

OPT2 &= 0xFE

CRE0 &= 0x1D

CRE6 &= 0x7F

EXFG ()

}

Method (SIOH, 0, NotSerialized)

{

Debug = "SIOH"

ENFG (0x0A)

If (OPT3 & 0x10)

{

Notify (PS2K, 0x02) // Device Wake

}

If (OPT3 & 0x20)

{

Notify (PS2M, 0x02) // Device Wake

}

SIOK (Zero)

}

OperationRegion (IOID, SystemIO, SPIO, 0x02)

Field (IOID, ByteAcc, NoLock, Preserve)

{

INDX, 8,

DATA, 8

}

IndexField (INDX, DATA, ByteAcc, NoLock, Preserve)

{

Offset (0x07),

LDN, 8,

Offset (0x22),

FDCP, 1,

, 2,

LPTP, 1,

URAP, 1,

URBP, 1,

Offset (0x30),

ACTR, 8,

Offset (0x60),

IOAH, 8,

IOAL, 8,

IOH2, 8,

IOL2, 8,

Offset (0x70),

INTR, 8,

Offset (0x74),

DMCH, 8,

Offset (0xE0),

CRE0, 8,

CRE1, 8,

CRE2, 8,

CRE3, 8,

CRE4, 8,

CRE5, 8,

CRE6, 8,

Offset (0xF0),

OPT0, 8,

OPT1, 8,

OPT2, 8,

OPT3, 8,

OPT4, 8,

Offset (0xF6),

OPT6, 8

}

Method (CGLD, 1, NotSerialized)

{

Return (DerefOf (DCAT [Arg0]))

}

Method (DSTA, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

Local0 = ACTR /* \_SB_.PCI0.SBRG.ACTR */

EXFG ()

If (Local0 == 0xFF)

{

Return (Zero)

}

Local0 &= One

IOST |= (Local0 << Arg0)

If (Local0)

{

Return (0x0F)

}

ElseIf ((One << Arg0) & IOST)

{

Return (0x0D)

}

Else

{

Return (Zero)

}

}

Method (DCNT, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

Local1 = (IOAH << 0x08)

Local1 |= IOAL

If ((DMCH < 0x04) && ((Local1 = (DMCH & 0x03)) != Zero))

{

RDMA (Arg0, Arg1, Local1++)

}

ACTR = Arg1

RRIO (Arg0, Arg1, Local1, 0x08)

EXFG ()

}

Name (CRS1, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y05)

IRQNoFlags (_Y03)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y04)

{}

})

CreateWordField (CRS1, \_SB.PCI0.SBRG._Y03._INT, IRQM) // _INT: Interrupts

CreateByteField (CRS1, \_SB.PCI0.SBRG._Y04._DMA, DMAM) // _DMA: Direct Memory Access

CreateWordField (CRS1, \_SB.PCI0.SBRG._Y05._MIN, IO11) // _MIN: Minimum Base Address

CreateWordField (CRS1, \_SB.PCI0.SBRG._Y05._MAX, IO12) // _MAX: Maximum Base Address

CreateByteField (CRS1, \_SB.PCI0.SBRG._Y05._LEN, LEN1) // _LEN: Length

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y08)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y09)

IRQNoFlags (_Y06)

{6}

DMA (Compatibility, NotBusMaster, Transfer8, _Y07)

{2}

})

CreateWordField (CRS2, \_SB.PCI0.SBRG._Y06._INT, IRQE) // _INT: Interrupts

CreateByteField (CRS2, \_SB.PCI0.SBRG._Y07._DMA, DMAE) // _DMA: Direct Memory Access

CreateWordField (CRS2, \_SB.PCI0.SBRG._Y08._MIN, IO21) // _MIN: Minimum Base Address

CreateWordField (CRS2, \_SB.PCI0.SBRG._Y08._MAX, IO22) // _MAX: Maximum Base Address

CreateByteField (CRS2, \_SB.PCI0.SBRG._Y08._LEN, LEN2) // _LEN: Length

CreateWordField (CRS2, \_SB.PCI0.SBRG._Y09._MIN, IO31) // _MIN: Minimum Base Address

CreateWordField (CRS2, \_SB.PCI0.SBRG._Y09._MAX, IO32) // _MAX: Maximum Base Address

CreateByteField (CRS2, \_SB.PCI0.SBRG._Y09._LEN, LEN3) // _LEN: Length

Method (DCRS, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

IO11 = (IOAH << 0x08)

IO11 |= IOAL /* \_SB_.PCI0.SBRG.IO11 */

IO12 = IO11 /* \_SB_.PCI0.SBRG.IO11 */

Local0 = (FindSetRightBit (IO11) - One)

LEN1 = (One << Local0)

If (INTR)

{

IRQM = (One << INTR) /* \_SB_.PCI0.SBRG.INTR */

}

Else

{

IRQM = Zero

}

If ((DMCH > 0x03) || (Arg1 == Zero))

{

DMAM = Zero

}

Else

{

Local1 = (DMCH & 0x03)

DMAM = (One << Local1)

}

EXFG ()

Return (CRS1) /* \_SB_.PCI0.SBRG.CRS1 */

}

Method (DSRS, 2, NotSerialized)

{

CreateWordField (Arg0, 0x09, IRQM)

CreateByteField (Arg0, 0x0C, DMAM)

CreateWordField (Arg0, 0x02, IO11)

ENFG (CGLD (Arg1))

Local1 = (IOAH << 0x08)

Local1 |= IOAL

RRIO (Arg1, Zero, Local1, 0x08)

RRIO (Arg1, One, IO11, 0x08)

IOAL = (IO11 & 0xFF)

IOAH = (IO11 >> 0x08)

If (IRQM)

{

FindSetRightBit (IRQM, Local0)

INTR = (Local0 - One)

}

Else

{

INTR = Zero

}

If (DMAM)

{

FindSetRightBit (DMAM, Local0)

DMCH = (Local0 - One)

}

Else

{

DMCH = 0x04

}

EXFG ()

DCNT (Arg1, One)

}

Device (RMSC)

{

Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID

Name (_UID, 0x10) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

IO (Decode16,

0x0010, // Range Minimum

0x0010, // Range Maximum

0x00, // Alignment

0x10, // Length

)

IO (Decode16,

0x0022, // Range Minimum

0x0022, // Range Maximum

0x00, // Alignment

0x1E, // Length

)

IO (Decode16,

0x0044, // Range Minimum

0x0044, // Range Maximum

0x00, // Alignment

0x0A, // Length

)

IO (Decode16,

0x0050, // Range Minimum

0x0050, // Range Maximum

0x00, // Alignment

0x10, // Length

)

IO (Decode16,

0x0062, // Range Minimum

0x0062, // Range Maximum

0x00, // Alignment

0x02, // Length

)

IO (Decode16,

0x0065, // Range Minimum

0x0065, // Range Maximum

0x00, // Alignment

0x0B, // Length

)

IO (Decode16,

0x0072, // Range Minimum

0x0072, // Range Maximum

0x00, // Alignment

0x0E, // Length

)

IO (Decode16,

0x0080, // Range Minimum

0x0080, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0084, // Range Minimum

0x0084, // Range Maximum

0x00, // Alignment

0x03, // Length

)

IO (Decode16,

0x0088, // Range Minimum

0x0088, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x008C, // Range Minimum

0x008C, // Range Maximum

0x00, // Alignment

0x03, // Length

)

IO (Decode16,

0x0090, // Range Minimum

0x0090, // Range Maximum

0x00, // Alignment

0x10, // Length

)

IO (Decode16,

0x00A2, // Range Minimum

0x00A2, // Range Maximum

0x00, // Alignment

0x1E, // Length

)

IO (Decode16,

0x00E0, // Range Minimum

0x00E0, // Range Maximum

0x00, // Alignment

0x10, // Length

)

IO (Decode16,

0x04D0, // Range Minimum

0x04D0, // Range Maximum

0x00, // Alignment

0x02, // Length

)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y0A)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y0B)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y0C)

Memory32Fixed (ReadWrite,

0xFED08000, // Address Base

0x00001000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFED1C000, // Address Base

0x00004000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFED20000, // Address Base

0x00020000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFED50000, // Address Base

0x00040000, // Address Length

)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0A._MIN, GP00) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0A._MAX, GP01) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0A._LEN, GP0L) // _LEN: Length

GP00 = PMBS /* \PMBS */

GP01 = PMBS /* \PMBS */

GP0L = PMLN /* \PMLN */

If (SMBS)

{

CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0B._MIN, GP10) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0B._MAX, GP11) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0B._LEN, GP1L) // _LEN: Length

GP10 = SMBS /* \SMBS */

GP11 = SMBS /* \SMBS */

GP1L = SMBL /* \SMBL */

}

If (GPBS)

{

CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MIN, GP20) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MAX, GP21) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._LEN, GP2L) // _LEN: Length

GP20 = GPBS /* \GPBS */

GP21 = GPBS /* \GPBS */

GP2L = GPLN /* \GPLN */

}

Return (CRS) /* \_SB_.PCI0.SBRG.RMSC.CRS_ */

}

}

Scope (\)

{

OperationRegion (RAMW, SystemMemory, 0xCFFF0000, 0x00010000)

Field (RAMW, ByteAcc, NoLock, Preserve)

{

PAR0, 32,

PAR1, 32,

PAR2, 32

}

OperationRegion (IOB2, SystemIO, 0xB2, 0x02)

Field (IOB2, ByteAcc, NoLock, Preserve)

{

SMIC, 8,

SMIS, 8

}

Method (ISMI, 1, Serialized)

{

SMIC = Arg0

}

Method (GNVS, 1, Serialized)

{

PAR0 = Arg0

ISMI (0x70)

Return (PAR1) /* \PAR1 */

}

Method (SNVS, 2, Serialized)

{

PAR0 = Arg0

PAR1 = Arg1

ISMI (0x71)

}

Method (GMAX, 1, Serialized)

{

PAR0 = Arg0

ISMI (0x74)

Return (PAR1) /* \PAR1 */

}

Method (GMDX, 1, Serialized)

{

PAR0 = Arg0

ISMI (0x75)

Return (PAR1) /* \PAR1 */

}

Method (GCAX, 1, Serialized)

{

PAR0 = Arg0

ISMI (0x76)

Return (PAR1) /* \PAR1 */

}

Method (GCDX, 1, Serialized)

{

PAR0 = Arg0

ISMI (0x77)

Return (PAR1) /* \PAR1 */

}

}

Scope (\_SB.PCI0.SBRG)

{

Device (ASOC)

{

Name (_HID, "ATK0110") // _HID: Hardware ID

Name (_UID, 0x01010110) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (0x0F)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

MEMI ()

CURI ()

FSBI ()

}

Name (FSB2, Package (0x0B)

{

0x0A,

"Auto",

"400 MHz",

"480 MHz",

"500 MHz",

"533 MHz",

"600 MHz",

"640 MHz",

"667 MHz",

"800 MHz",

""

})

Name (FSB0, Package (0x0B)

{

0x0A,

"Auto",

"533 MHz",

"640 MHz",

"667 MHz",

"710 MHz",

"800 MHz",

"850 MHz",

"890 MHz",

"1066 MHz",

""

})

Name (FSB4, Package (0x0B)

{

0x0A,

"Auto",

"667 MHz",

"800 MHz",

"840 MHz",

"890 MHz",

"1000 MHz",

"1066 MHz",

"1100 MHz",

"1333 MHz",

""

})

Name (FSB6, Package (0x0B)

{

0x0A,

"Auto",

"800 MHz",

"960 MHz",

"1000 MHz",

"1066 MHz",

"1200 MHz",

"1280 MHz",

"1333 MHz",

"1600 MHz",

""

})

Method (SMFL, 1, NotSerialized)

{

Name (TMPI, Zero)

Name (TMPJ, 0x04)

Name (FCNT, 0x0B)

While (TMPI < FCNT)

{

G322 [TMPJ] = DerefOf (Arg0 [TMPI])

TMPI++

TMPJ++

}

}

Method (MEMI, 0, NotSerialized)

{

Local0 = GNVS (0xA7A0)

If (Local0 < 0xC8)

{

SMFL (FSB2)

}

ElseIf (Local0 < 0x010A)

{

SMFL (FSB2)

}

ElseIf (Local0 < 0x014D)

{

SMFL (FSB0)

}

ElseIf (Local0 < 0x0190)

{

SMFL (FSB4)

}

Else

{

SMFL (FSB6)

}

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = GNVS (0x17CE)

If (_T_0 == Zero)

{

G321 [0x04] = 0x0708

}

ElseIf (_T_0 == One)

{

G321 [0x04] = 0x05DC

}

}

Method (CURI, 0, NotSerialized)

{

If ((Local0 = (GCAX (One) & 0x0FF0)) > 0x06F0)

{

Local0 = GMAX (0x2C)

Local2 = ((Local0 >> 0x08) & 0xFF)

Local1 = (Local0 & 0xFF)

Local0 = (Local1 - Local2)

Local7 = GMDX (0x0198)

Local7 = ((Local7 >> 0x08) & 0xFF)

If (Local7 < Local0)

{

Local7 = Local1

}

}

Else

{

Local0 = GMAX (0x17)

Local1 = ((Local0 >> 0x08) & 0x1F)

Local7 = Local1

Local0 = GMAX (0x0198)

Local0 = ((Local0 >> 0x18) & 0x1F)

}

Local2 = (Local0 * 0x0A)

G3T2 [0x04] = (Local2 | 0xFF000000)

If (GMAX (0x0198) & 0x80000000)

{

Local1 = 0x1F

}

If (GMAX (0x17) & 0x00800000)

{

Local2 = (GMAX (0x17) & 0x4000)

G3T2 [0x05] = 0x05

Local5 = ((GMAX (0x17) & 0x4000) >> 0x0E)

Local4 = (Local7 - Local0)

Local6 = (Local4 * 0x02)

G3T2 [0x03] = (Local6 + Local5)

Local3 = ((Local3 = (Local1 - Local0)) * 0x02)

Local3 += One

If (Local2)

{

Local3 += One

}

G3T2 [0x06] = Local3

}

Else

{

G3T2 [0x05] = 0x0A

G3T2 [0x03] = (Local7 - Local0)

G3T2 [0x06] = ((Local3 = (Local1 - Local0)) + One)

}

}

Method (FSBI, 0, NotSerialized)

{

If ((Local0 = (GCAX (One) & 0x0FF0)) > 0x06F0)

{

Local0 = ((GMAX (0x2C) >> 0x10) & 0x07)

}

Else

{

Local0 = (GMAX (0xCD) & 0x07)

}

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = Local0

If (_T_0 == Zero)

{

G3T0 [0x03] = 0x42

}

ElseIf (_T_0 == 0x02)

{

G3T0 [0x03] = Zero

}

ElseIf (_T_0 == 0x04)

{

G3T0 [0x03] = 0x85

}

ElseIf (_T_0 == 0x06)

{

G3T0 [0x03] = 0xC8

}

}

Name (MBIF, Package (0x08)

{

0x03,

"P5Q-Deluxe",

0x01010201,

0x01000100,

0xE0000000,

Zero,

Zero,

Zero

})

Name (ASBF, Buffer (0x08)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */

})

CreateDWordField (ASBF, Zero, ASB0)

CreateDWordField (ASBF, 0x04, ASB1)

Method (GGRP, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = Arg0

If (_T_0 == Zero)

{

Return (GRP0) /* \_SB_.PCI0.SBRG.ASOC.GRP0 */

}

ElseIf (_T_0 == 0x03)

{

Return (GRP3) /* \_SB_.PCI0.SBRG.ASOC.GRP3 */

}

ElseIf (_T_0 == 0x04)

{

Return (GRP4) /* \_SB_.PCI0.SBRG.ASOC.GRP4 */

}

ElseIf (_T_0 == 0x05)

{

Return (GRP5) /* \_SB_.PCI0.SBRG.ASOC.GRP5 */

}

ElseIf (_T_0 == 0x06)

{

Return (GRP6) /* \_SB_.PCI0.SBRG.ASOC.GRP6 */

}

ElseIf (_T_0 == 0x09)

{

Return (GRP9) /* \_SB_.PCI0.SBRG.ASOC.GRP9 */

}

ElseIf (_T_0 == 0x0B)

{

Return (GRPB) /* \_SB_.PCI0.SBRG.ASOC.GRPB */

}

ElseIf (_T_0 == 0x0E)

{

Return (GRPE) /* \_SB_.PCI0.SBRG.ASOC.GRPE */

}

ElseIf (_T_0 == 0x0F)

{

Return (GRPF ())

}

Else

{

Return (Zero)

}

}

Method (GITM, 1, Serialized)

{

CreateDWordField (Arg0, Zero, PRM0)

CreateByteField (Arg0, 0x03, GPID)

ASB0 = One

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = GPID /* \_SB_.PCI0.SBRG.ASOC.GITM.GPID */

If (_T_0 == 0x03)

{

GIT3 (PRM0)

}

ElseIf (_T_0 == 0x04)

{

GIT4 (PRM0)

}

ElseIf (_T_0 == 0x05)

{

GIT5 (PRM0)

}

ElseIf (_T_0 == 0x06)

{

GIT6 (PRM0)

}

ElseIf (_T_0 == 0x09)

{

GIT9 (PRM0)

}

ElseIf (_T_0 == 0x0B)

{

GITB (PRM0)

}

ElseIf (_T_0 == 0x0E)

{

GITE (PRM0)

}

ElseIf (_T_0 == 0x0F)

{

GITF (PRM0)

}

Else

{

ASB0 = Zero

}

Return (ASBF) /* \_SB_.PCI0.SBRG.ASOC.ASBF */

}

Method (SITM, 1, Serialized)

{

CreateDWordField (Arg0, Zero, PRM0)

CreateDWordField (Arg0, 0x04, PRM1)

CreateDWordField (Arg0, 0x08, PRM2)

CreateByteField (Arg0, 0x03, GPID)

ASB0 = One

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = GPID /* \_SB_.PCI0.SBRG.ASOC.SITM.GPID */

If (_T_0 == 0x03)

{

SIT3 (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x04)

{

SIT4 (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x05)

{

SIT5 (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x06)

{

SIT6 (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x09)

{

SIT9 (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x0B)

{

SITB (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x0E)

{

SITE (PRM0, PRM1, PRM2)

}

ElseIf (_T_0 == 0x0F)

{

SITF (PRM0, PRM1, PRM2)

}

Else

{

ASB0 = Zero

}

Return (ASBF) /* \_SB_.PCI0.SBRG.ASOC.ASBF */

}

Method (OP2V, 2, NotSerialized)

{

Local0 = DerefOf (Arg1 [0x04])

Local1 = DerefOf (Arg1 [0x05])

Local1 *= Arg0

Local0 += Local1

Return (Local0)

}

Method (V2OP, 2, NotSerialized)

{

Local0 = DerefOf (Arg1 [0x04])

Local1 = DerefOf (Arg1 [0x05])

Local0 = (Arg0 - Local0)

Divide (Local0, Local1, Local1, Local0)

Return (Local0)

}

}

}

Device (HPET)

{

Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: Compatible ID

Name (_STA, 0x0F) // _STA: Status

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IRQNoFlags ()

{0,8,11}

Memory32Fixed (ReadWrite,

0xFED00000, // Address Base

0x00000400, // Address Length

)

})

}

OperationRegion (RX80, PCI_Config, Zero, 0xFF)

Field (RX80, ByteAcc, NoLock, Preserve)

{

Offset (0x80),

LPCD, 16,

LPCE, 16

}

Name (DBPT, Package (0x04)

{

Package (0x08)

{

0x03F8,

0x02F8,

0x0220,

0x0228,

0x0238,

0x02E8,

0x0338,

0x03E8

},

Package (0x08)

{

0x03F8,

0x02F8,

0x0220,

0x0228,

0x0238,

0x02E8,

0x0338,

0x03E8

},

Package (0x03)

{

0x0378,

0x0278,

0x03BC

},

Package (0x02)

{

0x03F0,

0x0370

}

})

Name (DDLT, Package (0x04)

{

Package (0x02)

{

Zero,

0xFFF8

},

Package (0x02)

{

0x04,

0xFF8F

},

Package (0x02)

{

0x08,

0xFCFF

},

Package (0x02)

{

0x0C,

0xEFFF

}

})

Method (RRIO, 4, NotSerialized)

{

If ((Arg0 <= 0x03) && (Arg0 >= Zero))

{

Local0 = Match (DerefOf (DBPT [Arg0]), MEQ, Arg2, MTR, Zero,

Zero)

If (Local0 != Ones)

{

Local1 = DerefOf (DerefOf (DDLT [Arg0]) [Zero])

Local2 = DerefOf (DerefOf (DDLT [Arg0]) [One])

Local0 <<= Local1

LPCD &= Local2

LPCD |= Local0

WX82 (Arg0, Arg1)

}

}

If (Arg0 == 0x08)

{

If (Arg2 == 0x0200)

{

WX82 (0x08, Arg0)

}

ElseIf (Arg2 == 0x0208)

{

WX82 (0x09, Arg0)

}

}

If ((Arg0 <= 0x0D) && (Arg0 >= 0x0A))

{

WX82 (Arg0, Arg1)

}

}

Method (WX82, 2, NotSerialized)

{

Local0 = (One << Arg0)

If (Arg1)

{

LPCE |= Local0

}

Else

{

Local0 = ~Local0

LPCE &= Local0

}

}

Method (RDMA, 3, NotSerialized)

{

}

Device (FWH)

{

Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID

Name (CRS, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y0D)

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y0E)

})

CreateDWordField (CRS, \_SB.PCI0.SBRG.FWH._Y0D._BAS, BS00) // _BAS: Base Address

CreateDWordField (CRS, \_SB.PCI0.SBRG.FWH._Y0D._LEN, BL00) // _LEN: Length

CreateDWordField (CRS, \_SB.PCI0.SBRG.FWH._Y0E._BAS, BS10) // _BAS: Base Address

CreateDWordField (CRS, \_SB.PCI0.SBRG.FWH._Y0E._LEN, BL10) // _LEN: Length

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = 0xFF800000

FindSetRightBit (FHD0, Local1)

Local1--

If (Local1)

{

Local1 *= 0x00080000

}

Local2 = (Local0 + Local1)

BS00 = Local2

BS10 = (BS00 + 0x00400000)

BL00 = (Zero - BS10) /* \_SB_.PCI0.SBRG.FWH_.BS10 */

BL10 = BL00 /* \_SB_.PCI0.SBRG.FWH_.BL00 */

Return (CRS) /* \_SB_.PCI0.SBRG.FWH_.CRS_ */

}

}

Device (FWHE)

{

Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID

Name (_UID, 0x03) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y0F)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

CreateDWordField (CRS, \_SB.PCI0.SBRG.FWHE._Y0F._BAS, BS00) // _BAS: Base Address

CreateDWordField (CRS, \_SB.PCI0.SBRG.FWHE._Y0F._LEN, BL00) // _LEN: Length

If (^^FWH.BS00 == Zero)

{

^^FWH._CRS ()

}

BS00 = (^^FWH.BS00 + ^^FWH.BL00) /* \_SB_.PCI0.SBRG.FWH_.BL00 */

BL00 = (^^FWH.BS10 - BS00) /* \_SB_.PCI0.SBRG.FWHE._CRS.BS00 */

Return (CRS) /* \_SB_.PCI0.SBRG.FWHE.CRS_ */

}

}

OperationRegion (FHR0, PCI_Config, 0xD8, 0x02)

Field (FHR0, ByteAcc, NoLock, Preserve)

{

FHD1, 4,

Offset (0x01),

FHD0, 8

}

Device (^PCIE)

{

Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID

Name (_UID, 0x11) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xE0000000, // Address Base

0x10000000, // Address Length

_Y10)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._BAS, BAS1) // _BAS: Base Address

CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._LEN, LEN1) // _LEN: Length

BAS1 = PCIB /* \PCIB */

LEN1 = PCIL /* \PCIL */

Return (CRS) /* \_SB_.PCI0.PCIE.CRS_ */

}

}

Scope (\_GPE)

{

Method (_L1A, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.SBRG.ASOC, One) // Device Check

Sleep (0x03E8)

}

}

Scope (ASOC)

{

Name (VESL, Zero)

Method (SPLV, 1, Serialized)

{

VESL = (Arg0 & 0xFFFF)

PAR0 = VESL /* \_SB_.PCI0.SBRG.ASOC.VESL */

ISMI (0x88)

Local0 = (PAR0 & 0xFFFF)

Return (Local0)

}

Method (GPLV, 0, Serialized)

{

Return (VESL) /* \_SB_.PCI0.SBRG.ASOC.VESL */

}

}

Device (OMSC)

{

Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y13)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y14)

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y11)

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y12)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (APIC)

{

CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._LEN, ML01) // _LEN: Length

CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._BAS, MB01) // _BAS: Base Address

CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._LEN, ML02) // _LEN: Length

CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._BAS, MB02) // _BAS: Base Address

MB01 = 0xFEC00000

ML01 = 0x1000

MB02 = 0xFEE00000

ML02 = 0x1000

}

Local0 = (One << 0x0A)

If (IOST & Local0) {}

Else

{

Local1 = (One << 0x0C)

If (IOST & Local1) {}

Else

{

CreateWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y13._MIN, P60N) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y13._MAX, P60M) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.OMSC._Y13._LEN, P60L) // _LEN: Length

CreateWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y14._MIN, P64N) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y14._MAX, P64M) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.SBRG.OMSC._Y14._LEN, P64L) // _LEN: Length

P60N = 0x60

P60M = 0x60

P60L = One

P64N = 0x64

P64M = 0x64

P64L = One

}

}

Return (CRS) /* \_SB_.PCI0.SBRG.OMSC.CRS_ */

}

}

Device (^^RMEM)

{

Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x000A0000, // Address Length

)

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y15)

Memory32Fixed (ReadOnly,

0x000E0000, // Address Base

0x00020000, // Address Length

_Y16)

Memory32Fixed (ReadWrite,

0x00100000, // Address Base

0x00000000, // Address Length

_Y17)

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00000000, // Address Length

_Y18)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

CreateDWordField (CRS, \_SB.RMEM._Y15._BAS, BAS1) // _BAS: Base Address

CreateDWordField (CRS, \_SB.RMEM._Y15._LEN, LEN1) // _LEN: Length

CreateDWordField (CRS, \_SB.RMEM._Y16._BAS, BAS2) // _BAS: Base Address

CreateDWordField (CRS, \_SB.RMEM._Y16._LEN, LEN2) // _LEN: Length

CreateDWordField (CRS, \_SB.RMEM._Y17._LEN, LEN3) // _LEN: Length

CreateDWordField (CRS, \_SB.RMEM._Y18._BAS, BAS4) // _BAS: Base Address

CreateDWordField (CRS, \_SB.RMEM._Y18._LEN, LEN4) // _LEN: Length

If (OSFL ()) {}

ElseIf (MG1B)

{

If (MG1B > 0x000C0000)

{

BAS1 = 0x000C0000

LEN1 = (MG1B - BAS1) /* \_SB_.RMEM._CRS.BAS1 */

}

}

Else

{

BAS1 = 0x000C0000

LEN1 = 0x00020000

}

LEN3 = (MG2B - 0x00100000)

BAS4 = (MG2B + MG2L) /* \MG2L */

LEN4 = (Zero - BAS4) /* \_SB_.RMEM._CRS.BAS4 */

Return (CRS) /* \_SB_.RMEM.CRS_ */

}

}

Device (PS2K)

{

Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID

Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (One << 0x0A)

If (IOST & Local0)

{

Return (0x0F)

}

Return (Zero)

}

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{1}

})

}

Method (PS2K._PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x1D, 0x04))

}

Device (PS2M)

{

Name (_HID, EisaId ("PNP0F03") /* Microsoft PS/2-style Mouse */) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (One << 0x0C)

If (IOST & Local0)

{

Return (0x0F)

}

Return (Zero)

}

Name (CRS1, ResourceTemplate ()

{

IRQNoFlags ()

{12}

})

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{12}

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (One << 0x0A)

If (IOST & Local0)

{

Return (CRS1) /* \_SB_.PCI0.SBRG.PS2M.CRS1 */

}

Else

{

Return (CRS2) /* \_SB_.PCI0.SBRG.PS2M.CRS2 */

}

}

}

Method (PS2M._PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0F, 0x04))

}

}

Device (SATA)

{

Name (_ADR, 0x001F0002) // _ADR: Address

Name (^NATA, Package (0x01)

{

0x001F0002

})

Name (\FZTF, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5 /* ....... */

})

Name (REGF, One)

Method (_REG, 2, NotSerialized) // _REG: Region Availability

{

If (Arg0 == 0x02)

{

REGF = Arg1

}

}

Name (TIM0, Package (0x08)

{

Package (0x04)

{

0x78,

0xB4,

0xF0,

0x0384

},

Package (0x04)

{

0x23,

0x21,

0x10,

Zero

},

Package (0x04)

{

0x0B,

0x09,

0x04,

Zero

},

Package (0x06)

{

0x78,

0x50,

0x3C,

0x28,

0x1E,

0x14

},

Package (0x06)

{

Zero,

One,

0x02,

One,

0x02,

One

},

Package (0x06)

{

Zero,

Zero,

Zero,

One,

One,

One

},

Package (0x04)

{

0x04,

0x03,

0x02,

Zero

},

Package (0x04)

{

0x02,

One,

Zero,

Zero

}

})

Name (TMD0, Buffer (0x14) {})

CreateDWordField (TMD0, Zero, PIO0)

CreateDWordField (TMD0, 0x04, DMA0)

CreateDWordField (TMD0, 0x08, PIO1)

CreateDWordField (TMD0, 0x0C, DMA1)

CreateDWordField (TMD0, 0x10, CHNF)

OperationRegion (CFG2, PCI_Config, 0x40, 0x20)

Field (CFG2, DWordAcc, NoLock, Preserve)

{

PMPT, 4,

PSPT, 4,

PMRI, 6,

Offset (0x02),

SMPT, 4,

SSPT, 4,

SMRI, 6,

Offset (0x04),

PSRI, 4,

SSRI, 4,

Offset (0x08),

PM3E, 1,

PS3E, 1,

SM3E, 1,

SS3E, 1,

Offset (0x0A),

PMUT, 2,

, 2,

PSUT, 2,

Offset (0x0B),

SMUT, 2,

, 2,

SSUT, 2,

Offset (0x0C),

Offset (0x14),

PM6E, 1,

PS6E, 1,

SM6E, 1,

SS6E, 1,

PMCR, 1,

PSCR, 1,

SMCR, 1,

SSCR, 1,

, 4,

PMAE, 1,

PSAE, 1,

SMAE, 1,

SSAE, 1

}

Name (GMPT, Zero)

Name (GMUE, Zero)

Name (GMUT, Zero)

Name (GMCR, Zero)

Name (GSPT, Zero)

Name (GSUE, Zero)

Name (GSUT, Zero)

Name (GSCR, Zero)

Device (CHN0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode

{

Local1 = (PSCR << One)

Local0 = (PMCR | Local1)

Local3 = (PMAE << 0x02)

Local4 = (PM6E << One)

Local3 |= Local4

Local1 = (PM3E | Local3)

Local3 = (PMPT << 0x04)

Local1 |= Local3

Local3 = (PSAE << 0x02)

Local4 = (PS6E << One)

Local3 |= Local4

Local2 = (PS3E | Local3)

Local3 = (PSPT << 0x04)

Local2 |= Local3

Return (GTM (PMRI, Local1, PMUT, PSRI, Local2, PSUT, Local0))

}

Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode

{

Debug = Arg0

TMD0 = Arg0

Local3 = (PMAE << 0x02)

Local4 = (PM6E << One)

Local3 |= Local4

Local0 = (PM3E | Local3)

Local3 = (PMPT << 0x04)

Local0 |= Local3

Local3 = (PSAE << 0x02)

Local4 = (PS6E << One)

Local3 |= Local4

Local1 = (PS3E | Local3)

Local3 = (PSPT << 0x04)

Local1 |= Local3

GMPT = PMRI /* \_SB_.PCI0.SATA.PMRI */

GMUE = Local0

GMUT = PMUT /* \_SB_.PCI0.SATA.PMUT */

GMCR = PMCR /* \_SB_.PCI0.SATA.PMCR */

GSPT = PSRI /* \_SB_.PCI0.SATA.PSRI */

GSUE = Local1

GSUT = PSUT /* \_SB_.PCI0.SATA.PSUT */

GSCR = PSCR /* \_SB_.PCI0.SATA.PSCR */

STM ()

PMRI = GMPT /* \_SB_.PCI0.SATA.GMPT */

Local0 = GMUE /* \_SB_.PCI0.SATA.GMUE */

PMUT = GMUT /* \_SB_.PCI0.SATA.GMUT */

PMCR = GMCR /* \_SB_.PCI0.SATA.GMCR */

Local1 = GSUE /* \_SB_.PCI0.SATA.GSUE */

PSUT = GSUT /* \_SB_.PCI0.SATA.GSUT */

PSCR = GSCR /* \_SB_.PCI0.SATA.GSCR */

If (Local0 & One)

{

PM3E = One

}

Else

{

PM3E = Zero

}

If (Local0 & 0x02)

{

PM6E = One

}

Else

{

PM6E = Zero

}

If (Local0 & 0x04)

{

PMAE = One

}

Else

{

PMAE = Zero

}

If (Local1 & One)

{

PS3E = One

}

Else

{

PS3E = Zero

}

If (Local1 & 0x02)

{

PS6E = One

}

Else

{

PS6E = Zero

}

If (Local1 & 0x04)

{

PSAE = One

}

Else

{

PSAE = Zero

}

ATA0 = GTF (Zero, Arg1)

ATA1 = GTF (One, Arg2)

}

Device (DRV0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA0))

}

}

Device (DRV1)

{

Name (_ADR, One) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA1))

}

}

}

Device (CHN1)

{

Name (_ADR, One) // _ADR: Address

Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode

{

Local1 = (SSCR << One)

Local0 = (SMCR | Local1)

Local3 = (SMAE << 0x02)

Local4 = (SM6E << One)

Local3 |= Local4

Local1 = (SM3E | Local3)

Local3 = (SMPT << 0x04)

Local1 |= Local3

Local3 = (SSAE << 0x02)

Local4 = (SS6E << One)

Local3 |= Local4

Local2 = (SS3E | Local3)

Local3 = (SSPT << 0x04)

Local2 |= Local3

Return (GTM (SMRI, Local1, SMUT, SSRI, Local2, SSUT, Local0))

}

Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode

{

Debug = Arg0

TMD0 = Arg0

Local3 = (SMAE << 0x02)

Local4 = (SM6E << One)

Local3 |= Local4

Local0 = (SM3E | Local3)

Local3 = (SMPT << 0x04)

Local0 |= Local3

Local3 = (SSAE << 0x02)

Local4 = (SS6E << One)

Local3 |= Local4

Local1 = (SS3E | Local3)

Local3 = (SSPT << 0x04)

Local1 |= Local3

GMPT = SMRI /* \_SB_.PCI0.SATA.SMRI */

GMUE = Local0

GMUT = SMUT /* \_SB_.PCI0.SATA.SMUT */

GMCR = SMCR /* \_SB_.PCI0.SATA.SMCR */

GSPT = SSRI /* \_SB_.PCI0.SATA.SSRI */

GSUE = Local1

GSUT = SSUT /* \_SB_.PCI0.SATA.SSUT */

GSCR = SSCR /* \_SB_.PCI0.SATA.SSCR */

STM ()

SMRI = GMPT /* \_SB_.PCI0.SATA.GMPT */

Local0 = GMUE /* \_SB_.PCI0.SATA.GMUE */

SMUT = GMUT /* \_SB_.PCI0.SATA.GMUT */

SMCR = GMCR /* \_SB_.PCI0.SATA.GMCR */

Local1 = GSUE /* \_SB_.PCI0.SATA.GSUE */

SSUT = GSUT /* \_SB_.PCI0.SATA.GSUT */

SSCR = GSCR /* \_SB_.PCI0.SATA.GSCR */

If (Local0 & One)

{

SM3E = One

}

Else

{

SM3E = Zero

}

If (Local0 & 0x02)

{

SM6E = One

}

Else

{

SM6E = Zero

}

If (Local0 & 0x04)

{

SMAE = One

}

Else

{

SMAE = Zero

}

If (Local1 & One)

{

SS3E = One

}

Else

{

SS3E = Zero

}

If (Local1 & 0x02)

{

SS6E = One

}

Else

{

SS6E = Zero

}

If (Local1 & 0x04)

{

SSAE = One

}

Else

{

SSAE = Zero

}

ATA2 = GTF (Zero, Arg1)

ATA3 = GTF (One, Arg2)

}

Device (DRV0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA2))

}

}

Device (DRV1)

{

Name (_ADR, One) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA3))

}

}

}

Method (GTM, 7, Serialized)

{

PIO0 = Ones

PIO1 = Ones

DMA0 = Ones

DMA1 = Ones

CHNF = 0x10

If (REGF) {}

Else

{

Return (TMD0) /* \_SB_.PCI0.SATA.TMD0 */

}

If (Arg1 & 0x20)

{

CHNF |= 0x02

}

Local6 = Match (DerefOf (TIM0 [One]), MEQ, Arg0, MTR, Zero,

Zero)

Local7 = DerefOf (DerefOf (TIM0 [Zero]) [Local6])

DMA0 = Local7

PIO0 = Local7

If (Arg4 & 0x20)

{

CHNF |= 0x08

}

Local6 = Match (DerefOf (TIM0 [0x02]), MEQ, Arg3, MTR, Zero,

Zero)

Local7 = DerefOf (DerefOf (TIM0 [Zero]) [Local6])

DMA1 = Local7

PIO1 = Local7

If (Arg1 & 0x07)

{

Local5 = Arg2

If (Arg1 & 0x02)

{

Local5 += 0x02

}

If (Arg1 & 0x04)

{

Local5 += 0x04

}

DMA0 = DerefOf (DerefOf (TIM0 [0x03]) [Local5])

CHNF |= One

}

If (Arg4 & 0x07)

{

Local5 = Arg5

If (Arg4 & 0x02)

{

Local5 += 0x02

}

If (Arg4 & 0x04)

{

Local5 += 0x04

}

DMA1 = DerefOf (DerefOf (TIM0 [0x03]) [Local5])

CHNF |= 0x04

}

Debug = TMD0 /* \_SB_.PCI0.SATA.TMD0 */

Return (TMD0) /* \_SB_.PCI0.SATA.TMD0 */

}

Method (STM, 0, Serialized)

{

If (REGF)

{

GMUE = Zero

GMUT = Zero

GSUE = Zero

GSUT = Zero

If (CHNF & One)

{

Local0 = Match (DerefOf (TIM0 [0x03]), MLE, DMA0, MTR, Zero,

Zero)

If (Local0 > 0x05)

{

Local0 = 0x05

}

GMUT = DerefOf (DerefOf (TIM0 [0x04]) [Local0])

GMUE |= One

If (Local0 > 0x02)

{

GMUE |= 0x02

}

If (Local0 > 0x04)

{

GMUE &= 0xFD

GMUE |= 0x04

}

}

ElseIf ((PIO0 == Ones) | (PIO0 == Zero))

{

If ((DMA0 < Ones) & (DMA0 > Zero))

{

PIO0 = DMA0 /* \_SB_.PCI0.SATA.DMA0 */

GMUE |= 0x80

}

}

If (CHNF & 0x04)

{

Local0 = Match (DerefOf (TIM0 [0x03]), MLE, DMA1, MTR, Zero,

Zero)

If (Local0 > 0x05)

{

Local0 = 0x05

}

GSUT = DerefOf (DerefOf (TIM0 [0x04]) [Local0])

GSUE |= One

If (Local0 > 0x02)

{

GSUE |= 0x02

}

If (Local0 > 0x04)

{

GSUE &= 0xFD

GSUE |= 0x04

}

}

ElseIf ((PIO1 == Ones) | (PIO1 == Zero))

{

If ((DMA1 < Ones) & (DMA1 > Zero))

{

PIO1 = DMA1 /* \_SB_.PCI0.SATA.DMA1 */

GSUE |= 0x80

}

}

If (CHNF & 0x02)

{

GMUE |= 0x20

}

If (CHNF & 0x08)

{

GSUE |= 0x20

}

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIO0, MTR, Zero,

Zero) & 0x07)

Local1 = DerefOf (DerefOf (TIM0 [One]) [Local0])

GMPT = Local1

If (Local0 < 0x03)

{

GMUE |= 0x50

}

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIO1, MTR, Zero,

Zero) & 0x07)

Local1 = DerefOf (DerefOf (TIM0 [0x02]) [Local0])

GSPT = Local1

If (Local0 < 0x03)

{

GSUE |= 0x50

}

}

}

Name (AT01, Buffer (0x07)

{

0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEF /* ....... */

})

Name (AT02, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90 /* ....... */

})

Name (AT03, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6 /* ....... */

})

Name (AT04, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x91 /* ....... */

})

Name (ATA0, Buffer (0x1D) {})

Name (ATA1, Buffer (0x1D) {})

Name (ATA2, Buffer (0x1D) {})

Name (ATA3, Buffer (0x1D) {})

Name (ATAB, Buffer (0x1D) {})

CreateByteField (ATAB, Zero, CMDC)

Method (GTFB, 3, Serialized)

{

Local0 = (CMDC * 0x38)

Local1 = (Local0 + 0x08)

CreateField (ATAB, Local1, 0x38, CMDX)

Local0 = (CMDC * 0x07)

CreateByteField (ATAB, (Local0 + 0x02), A001)

CreateByteField (ATAB, (Local0 + 0x06), A005)

CMDX = Arg0

A001 = Arg1

A005 = Arg2

CMDC++

}

Method (GTF, 2, Serialized)

{

Debug = Arg1

CMDC = Zero

Name (ID49, 0x0C00)

Name (ID59, Zero)

Name (ID53, 0x04)

Name (ID63, 0x0F00)

Name (ID88, 0x0F00)

Name (IRDY, One)

Name (PIOT, Zero)

Name (DMAT, Zero)

If (SizeOf (Arg1) == 0x0200)

{

CreateWordField (Arg1, 0x62, IW49)

ID49 = IW49 /* \_SB_.PCI0.SATA.GTF_.IW49 */

CreateWordField (Arg1, 0x6A, IW53)

ID53 = IW53 /* \_SB_.PCI0.SATA.GTF_.IW53 */

CreateWordField (Arg1, 0x7E, IW63)

ID63 = IW63 /* \_SB_.PCI0.SATA.GTF_.IW63 */

CreateWordField (Arg1, 0x76, IW59)

ID59 = IW59 /* \_SB_.PCI0.SATA.GTF_.IW59 */

CreateWordField (Arg1, 0xB0, IW88)

ID88 = IW88 /* \_SB_.PCI0.SATA.GTF_.IW88 */

}

Local7 = 0xA0

If (Arg0)

{

Local7 = 0xB0

IRDY = (CHNF & 0x08)

If (CHNF & 0x10)

{

PIOT = PIO1 /* \_SB_.PCI0.SATA.PIO1 */

}

Else

{

PIOT = PIO0 /* \_SB_.PCI0.SATA.PIO0 */

}

If (CHNF & 0x04)

{

If (CHNF & 0x10)

{

DMAT = DMA1 /* \_SB_.PCI0.SATA.DMA1 */

}

Else

{

DMAT = DMA0 /* \_SB_.PCI0.SATA.DMA0 */

}

}

}

Else

{

IRDY = (CHNF & 0x02)

PIOT = PIO0 /* \_SB_.PCI0.SATA.PIO0 */

If (CHNF & One)

{

DMAT = DMA0 /* \_SB_.PCI0.SATA.DMA0 */

}

}

If (((ID53 & 0x04) && (ID88 & 0xFF00)) && DMAT)

{

Local1 = Match (DerefOf (TIM0 [0x03]), MLE, DMAT, MTR, Zero,

Zero)

If (Local1 > 0x05)

{

Local1 = 0x05

}

GTFB (AT01, (0x40 | Local1), Local7)

}

ElseIf ((ID63 & 0xFF00) && PIOT)

{

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIOT, MTR, Zero,

Zero) & 0x03)

Local1 = (0x20 | DerefOf (DerefOf (TIM0 [0x07]) [Local0]))

GTFB (AT01, Local1, Local7)

}

If (IRDY)

{

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIOT, MTR, Zero,

Zero) & 0x07)

Local1 = (0x08 | DerefOf (DerefOf (TIM0 [0x06]) [Local0]))

GTFB (AT01, Local1, Local7)

}

ElseIf (ID49 & 0x0400)

{

GTFB (AT01, One, Local7)

}

If ((ID59 & 0x0100) && (ID59 & 0xFF))

{

GTFB (AT03, (ID59 & 0xFF), Local7)

}

Debug = ATAB /* \_SB_.PCI0.SATA.ATAB */

Return (ATAB) /* \_SB_.PCI0.SATA.ATAB */

}

Method (RATA, 1, NotSerialized)

{

CreateByteField (Arg0, Zero, CMDN)

Local0 = (CMDN * 0x38)

CreateField (Arg0, 0x08, Local0, RETB)

Debug = RETB /* \_SB_.PCI0.SATA.RATA.RETB */

Return (Concatenate (RETB, FZTF))

}

}

Device (SAT1)

{

Name (_ADR, 0x001F0005) // _ADR: Address

Name (REGF, One)

Method (_REG, 2, NotSerialized) // _REG: Region Availability

{

If (Arg0 == 0x02)

{

REGF = Arg1

}

}

Name (TIM0, Package (0x08)

{

Package (0x04)

{

0x78,

0xB4,

0xF0,

0x0384

},

Package (0x04)

{

0x23,

0x21,

0x10,

Zero

},

Package (0x04)

{

0x0B,

0x09,

0x04,

Zero

},

Package (0x06)

{

0x78,

0x50,

0x3C,

0x28,

0x1E,

0x14

},

Package (0x06)

{

Zero,

One,

0x02,

One,

0x02,

One

},

Package (0x06)

{

Zero,

Zero,

Zero,

One,

One,

One

},

Package (0x04)

{

0x04,

0x03,

0x02,

Zero

},

Package (0x04)

{

0x02,

One,

Zero,

Zero

}

})

Name (TMD0, Buffer (0x14) {})

CreateDWordField (TMD0, Zero, PIO0)

CreateDWordField (TMD0, 0x04, DMA0)

CreateDWordField (TMD0, 0x08, PIO1)

CreateDWordField (TMD0, 0x0C, DMA1)

CreateDWordField (TMD0, 0x10, CHNF)

OperationRegion (CFG2, PCI_Config, 0x40, 0x20)

Field (CFG2, DWordAcc, NoLock, Preserve)

{

PMPT, 4,

PSPT, 4,

PMRI, 6,

Offset (0x02),

SMPT, 4,

SSPT, 4,

SMRI, 6,

Offset (0x04),

PSRI, 4,

SSRI, 4,

Offset (0x08),

PM3E, 1,

PS3E, 1,

SM3E, 1,

SS3E, 1,

Offset (0x0A),

PMUT, 2,

, 2,

PSUT, 2,

Offset (0x0B),

SMUT, 2,

, 2,

SSUT, 2,

Offset (0x0C),

Offset (0x14),

PM6E, 1,

PS6E, 1,

SM6E, 1,

SS6E, 1,

PMCR, 1,

PSCR, 1,

SMCR, 1,

SSCR, 1,

, 4,

PMAE, 1,

PSAE, 1,

SMAE, 1,

SSAE, 1

}

Name (GMPT, Zero)

Name (GMUE, Zero)

Name (GMUT, Zero)

Name (GMCR, Zero)

Name (GSPT, Zero)

Name (GSUE, Zero)

Name (GSUT, Zero)

Name (GSCR, Zero)

Device (CHN0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode

{

Local1 = (PSCR << One)

Local0 = (PMCR | Local1)

Local3 = (PMAE << 0x02)

Local4 = (PM6E << One)

Local3 |= Local4

Local1 = (PM3E | Local3)

Local3 = (PMPT << 0x04)

Local1 |= Local3

Local3 = (PSAE << 0x02)

Local4 = (PS6E << One)

Local3 |= Local4

Local2 = (PS3E | Local3)

Local3 = (PSPT << 0x04)

Local2 |= Local3

Return (GTM (PMRI, Local1, PMUT, PSRI, Local2, PSUT, Local0))

}

Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode

{

Debug = Arg0

TMD0 = Arg0

Local3 = (PMAE << 0x02)

Local4 = (PM6E << One)

Local3 |= Local4

Local0 = (PM3E | Local3)

Local3 = (PMPT << 0x04)

Local0 |= Local3

Local3 = (PSAE << 0x02)

Local4 = (PS6E << One)

Local3 |= Local4

Local1 = (PS3E | Local3)

Local3 = (PSPT << 0x04)

Local1 |= Local3

GMPT = PMRI /* \_SB_.PCI0.SAT1.PMRI */

GMUE = Local0

GMUT = PMUT /* \_SB_.PCI0.SAT1.PMUT */

GMCR = PMCR /* \_SB_.PCI0.SAT1.PMCR */

GSPT = PSRI /* \_SB_.PCI0.SAT1.PSRI */

GSUE = Local1

GSUT = PSUT /* \_SB_.PCI0.SAT1.PSUT */

GSCR = PSCR /* \_SB_.PCI0.SAT1.PSCR */

STM ()

PMRI = GMPT /* \_SB_.PCI0.SAT1.GMPT */

Local0 = GMUE /* \_SB_.PCI0.SAT1.GMUE */

PMUT = GMUT /* \_SB_.PCI0.SAT1.GMUT */

PMCR = GMCR /* \_SB_.PCI0.SAT1.GMCR */

Local1 = GSUE /* \_SB_.PCI0.SAT1.GSUE */

PSUT = GSUT /* \_SB_.PCI0.SAT1.GSUT */

PSCR = GSCR /* \_SB_.PCI0.SAT1.GSCR */

If (Local0 & One)

{

PM3E = One

}

Else

{

PM3E = Zero

}

If (Local0 & 0x02)

{

PM6E = One

}

Else

{

PM6E = Zero

}

If (Local0 & 0x04)

{

PMAE = One

}

Else

{

PMAE = Zero

}

If (Local1 & One)

{

PS3E = One

}

Else

{

PS3E = Zero

}

If (Local1 & 0x02)

{

PS6E = One

}

Else

{

PS6E = Zero

}

If (Local1 & 0x04)

{

PSAE = One

}

Else

{

PSAE = Zero

}

ATA0 = GTF (Zero, Arg1)

ATA1 = GTF (One, Arg2)

}

Device (DRV0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA0))

}

}

Device (DRV1)

{

Name (_ADR, One) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA1))

}

}

}

Device (CHN1)

{

Name (_ADR, One) // _ADR: Address

Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode

{

Local1 = (SSCR << One)

Local0 = (SMCR | Local1)

Local3 = (SMAE << 0x02)

Local4 = (SM6E << One)

Local3 |= Local4

Local1 = (SM3E | Local3)

Local3 = (SMPT << 0x04)

Local1 |= Local3

Local3 = (SSAE << 0x02)

Local4 = (SS6E << One)

Local3 |= Local4

Local2 = (SS3E | Local3)

Local3 = (SSPT << 0x04)

Local2 |= Local3

Return (GTM (SMRI, Local1, SMUT, SSRI, Local2, SSUT, Local0))

}

Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode

{

Debug = Arg0

TMD0 = Arg0

Local3 = (SMAE << 0x02)

Local4 = (SM6E << One)

Local3 |= Local4

Local0 = (SM3E | Local3)

Local3 = (SMPT << 0x04)

Local0 |= Local3

Local3 = (SSAE << 0x02)

Local4 = (SS6E << One)

Local3 |= Local4

Local1 = (SS3E | Local3)

Local3 = (SSPT << 0x04)

Local1 |= Local3

GMPT = SMRI /* \_SB_.PCI0.SAT1.SMRI */

GMUE = Local0

GMUT = SMUT /* \_SB_.PCI0.SAT1.SMUT */

GMCR = SMCR /* \_SB_.PCI0.SAT1.SMCR */

GSPT = SSRI /* \_SB_.PCI0.SAT1.SSRI */

GSUE = Local1

GSUT = SSUT /* \_SB_.PCI0.SAT1.SSUT */

GSCR = SSCR /* \_SB_.PCI0.SAT1.SSCR */

STM ()

SMRI = GMPT /* \_SB_.PCI0.SAT1.GMPT */

Local0 = GMUE /* \_SB_.PCI0.SAT1.GMUE */

SMUT = GMUT /* \_SB_.PCI0.SAT1.GMUT */

SMCR = GMCR /* \_SB_.PCI0.SAT1.GMCR */

Local1 = GSUE /* \_SB_.PCI0.SAT1.GSUE */

SSUT = GSUT /* \_SB_.PCI0.SAT1.GSUT */

SSCR = GSCR /* \_SB_.PCI0.SAT1.GSCR */

If (Local0 & One)

{

SM3E = One

}

Else

{

SM3E = Zero

}

If (Local0 & 0x02)

{

SM6E = One

}

Else

{

SM6E = Zero

}

If (Local0 & 0x04)

{

SMAE = One

}

Else

{

SMAE = Zero

}

If (Local1 & One)

{

SS3E = One

}

Else

{

SS3E = Zero

}

If (Local1 & 0x02)

{

SS6E = One

}

Else

{

SS6E = Zero

}

If (Local1 & 0x04)

{

SSAE = One

}

Else

{

SSAE = Zero

}

ATA2 = GTF (Zero, Arg1)

ATA3 = GTF (One, Arg2)

}

Device (DRV0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA2))

}

}

Device (DRV1)

{

Name (_ADR, One) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Return (RATA (ATA3))

}

}

}

Method (GTM, 7, Serialized)

{

PIO0 = Ones

PIO1 = Ones

DMA0 = Ones

DMA1 = Ones

CHNF = 0x10

If (REGF) {}

Else

{

Return (TMD0) /* \_SB_.PCI0.SAT1.TMD0 */

}

If (Arg1 & 0x20)

{

CHNF |= 0x02

}

Local6 = Match (DerefOf (TIM0 [One]), MEQ, Arg0, MTR, Zero,

Zero)

Local7 = DerefOf (DerefOf (TIM0 [Zero]) [Local6])

DMA0 = Local7

PIO0 = Local7

If (Arg4 & 0x20)

{

CHNF |= 0x08

}

Local6 = Match (DerefOf (TIM0 [0x02]), MEQ, Arg3, MTR, Zero,

Zero)

Local7 = DerefOf (DerefOf (TIM0 [Zero]) [Local6])

DMA1 = Local7

PIO1 = Local7

If (Arg1 & 0x07)

{

Local5 = Arg2

If (Arg1 & 0x02)

{

Local5 += 0x02

}

If (Arg1 & 0x04)

{

Local5 += 0x04

}

DMA0 = DerefOf (DerefOf (TIM0 [0x03]) [Local5])

CHNF |= One

}

If (Arg4 & 0x07)

{

Local5 = Arg5

If (Arg4 & 0x02)

{

Local5 += 0x02

}

If (Arg4 & 0x04)

{

Local5 += 0x04

}

DMA1 = DerefOf (DerefOf (TIM0 [0x03]) [Local5])

CHNF |= 0x04

}

Debug = TMD0 /* \_SB_.PCI0.SAT1.TMD0 */

Return (TMD0) /* \_SB_.PCI0.SAT1.TMD0 */

}

Method (STM, 0, Serialized)

{

If (REGF)

{

GMUE = Zero

GMUT = Zero

GSUE = Zero

GSUT = Zero

If (CHNF & One)

{

Local0 = Match (DerefOf (TIM0 [0x03]), MLE, DMA0, MTR, Zero,

Zero)

If (Local0 > 0x05)

{

Local0 = 0x05

}

GMUT = DerefOf (DerefOf (TIM0 [0x04]) [Local0])

GMUE |= One

If (Local0 > 0x02)

{

GMUE |= 0x02

}

If (Local0 > 0x04)

{

GMUE &= 0xFD

GMUE |= 0x04

}

}

ElseIf ((PIO0 == Ones) | (PIO0 == Zero))

{

If ((DMA0 < Ones) & (DMA0 > Zero))

{

PIO0 = DMA0 /* \_SB_.PCI0.SAT1.DMA0 */

GMUE |= 0x80

}

}

If (CHNF & 0x04)

{

Local0 = Match (DerefOf (TIM0 [0x03]), MLE, DMA1, MTR, Zero,

Zero)

If (Local0 > 0x05)

{

Local0 = 0x05

}

GSUT = DerefOf (DerefOf (TIM0 [0x04]) [Local0])

GSUE |= One

If (Local0 > 0x02)

{

GSUE |= 0x02

}

If (Local0 > 0x04)

{

GSUE &= 0xFD

GSUE |= 0x04

}

}

ElseIf ((PIO1 == Ones) | (PIO1 == Zero))

{

If ((DMA1 < Ones) & (DMA1 > Zero))

{

PIO1 = DMA1 /* \_SB_.PCI0.SAT1.DMA1 */

GSUE |= 0x80

}

}

If (CHNF & 0x02)

{

GMUE |= 0x20

}

If (CHNF & 0x08)

{

GSUE |= 0x20

}

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIO0, MTR, Zero,

Zero) & 0x07)

Local1 = DerefOf (DerefOf (TIM0 [One]) [Local0])

GMPT = Local1

If (Local0 < 0x03)

{

GMUE |= 0x50

}

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIO1, MTR, Zero,

Zero) & 0x07)

Local1 = DerefOf (DerefOf (TIM0 [0x02]) [Local0])

GSPT = Local1

If (Local0 < 0x03)

{

GSUE |= 0x50

}

}

}

Name (AT01, Buffer (0x07)

{

0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEF /* ....... */

})

Name (AT02, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90 /* ....... */

})

Name (AT03, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6 /* ....... */

})

Name (AT04, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x91 /* ....... */

})

Name (ATA0, Buffer (0x1D) {})

Name (ATA1, Buffer (0x1D) {})

Name (ATA2, Buffer (0x1D) {})

Name (ATA3, Buffer (0x1D) {})

Name (ATAB, Buffer (0x1D) {})

CreateByteField (ATAB, Zero, CMDC)

Method (GTFB, 3, Serialized)

{

Local0 = (CMDC * 0x38)

Local1 = (Local0 + 0x08)

CreateField (ATAB, Local1, 0x38, CMDX)

Local0 = (CMDC * 0x07)

CreateByteField (ATAB, (Local0 + 0x02), A001)

CreateByteField (ATAB, (Local0 + 0x06), A005)

CMDX = Arg0

A001 = Arg1

A005 = Arg2

CMDC++

}

Method (GTF, 2, Serialized)

{

Debug = Arg1

CMDC = Zero

Name (ID49, 0x0C00)

Name (ID59, Zero)

Name (ID53, 0x04)

Name (ID63, 0x0F00)

Name (ID88, 0x0F00)

Name (IRDY, One)

Name (PIOT, Zero)

Name (DMAT, Zero)

If (SizeOf (Arg1) == 0x0200)

{

CreateWordField (Arg1, 0x62, IW49)

ID49 = IW49 /* \_SB_.PCI0.SAT1.GTF_.IW49 */

CreateWordField (Arg1, 0x6A, IW53)

ID53 = IW53 /* \_SB_.PCI0.SAT1.GTF_.IW53 */

CreateWordField (Arg1, 0x7E, IW63)

ID63 = IW63 /* \_SB_.PCI0.SAT1.GTF_.IW63 */

CreateWordField (Arg1, 0x76, IW59)

ID59 = IW59 /* \_SB_.PCI0.SAT1.GTF_.IW59 */

CreateWordField (Arg1, 0xB0, IW88)

ID88 = IW88 /* \_SB_.PCI0.SAT1.GTF_.IW88 */

}

Local7 = 0xA0

If (Arg0)

{

Local7 = 0xB0

IRDY = (CHNF & 0x08)

If (CHNF & 0x10)

{

PIOT = PIO1 /* \_SB_.PCI0.SAT1.PIO1 */

}

Else

{

PIOT = PIO0 /* \_SB_.PCI0.SAT1.PIO0 */

}

If (CHNF & 0x04)

{

If (CHNF & 0x10)

{

DMAT = DMA1 /* \_SB_.PCI0.SAT1.DMA1 */

}

Else

{

DMAT = DMA0 /* \_SB_.PCI0.SAT1.DMA0 */

}

}

}

Else

{

IRDY = (CHNF & 0x02)

PIOT = PIO0 /* \_SB_.PCI0.SAT1.PIO0 */

If (CHNF & One)

{

DMAT = DMA0 /* \_SB_.PCI0.SAT1.DMA0 */

}

}

If (((ID53 & 0x04) && (ID88 & 0xFF00)) && DMAT)

{

Local1 = Match (DerefOf (TIM0 [0x03]), MLE, DMAT, MTR, Zero,

Zero)

If (Local1 > 0x05)

{

Local1 = 0x05

}

GTFB (AT01, (0x40 | Local1), Local7)

}

ElseIf ((ID63 & 0xFF00) && PIOT)

{

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIOT, MTR, Zero,

Zero) & 0x03)

Local1 = (0x20 | DerefOf (DerefOf (TIM0 [0x07]) [Local0]))

GTFB (AT01, Local1, Local7)

}

If (IRDY)

{

Local0 = (Match (DerefOf (TIM0 [Zero]), MGE, PIOT, MTR, Zero,

Zero) & 0x07)

Local1 = (0x08 | DerefOf (DerefOf (TIM0 [0x06]) [Local0]))

GTFB (AT01, Local1, Local7)

}

ElseIf (ID49 & 0x0400)

{

GTFB (AT01, One, Local7)

}

If ((ID59 & 0x0100) && (ID59 & 0xFF))

{

GTFB (AT03, (ID59 & 0xFF), Local7)

}

Debug = ATAB /* \_SB_.PCI0.SAT1.ATAB */

Return (ATAB) /* \_SB_.PCI0.SAT1.ATAB */

}

Method (RATA, 1, NotSerialized)

{

CreateByteField (Arg0, Zero, CMDN)

Local0 = (CMDN * 0x38)

CreateField (Arg0, 0x08, Local0, RETB)

Debug = RETB /* \_SB_.PCI0.SAT1.RATA.RETB */

Return (Concatenate (RETB, FZTF))

}

}

Device (EUSB)

{

Name (_ADR, 0x001D0007) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0D, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x0F)

{

"device-id",

Buffer (0x04)

{

0x3A, 0x3A, 0x00, 0x00 /* ::.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"EHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

},

"AAPL,current-available",

0x05DC,

"AAPL,current-extra",

0x03E8,

"AAPL,current-in-sleep",

0x0BB8,

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (USBE)

{

Name (_ADR, 0x001A0007) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0D, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x0F)

{

"device-id",

Buffer (0x04)

{

0x3C, 0x3A, 0x00, 0x00 /* <:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"EHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

},

"AAPL,current-available",

0x05DC,

"AAPL,current-extra",

0x03E8,

"AAPL,current-in-sleep",

0x0BB8,

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (P0P5)

{

Name (_ADR, 0x001C0001) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR05) /* \_SB_.AR05 */

}

Return (PR05) /* \_SB_.PR05 */

}

}

Device (P0P6)

{

Name (_ADR, 0x001C0002) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR06) /* \_SB_.AR06 */

}

Return (PR06) /* \_SB_.PR06 */

}

}

Device (P0P7)

{

Name (_ADR, 0x001C0003) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR07) /* \_SB_.AR07 */

}

Return (PR07) /* \_SB_.PR07 */

}

Device (GIGE)

{

Name (_ADR, Zero) // _ADR: Address

Name (_SUN, 0x00000002) // _SUN: Slot User Number

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x06)

{

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"model",

Buffer (0x08)

{

"Unknown"

},

"empty",

Zero

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

}

Device (P0P8)

{

Name (_ADR, 0x001C0004) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR08) /* \_SB_.AR08 */

}

Return (PR08) /* \_SB_.PR08 */

}

}

Device (P0P9)

{

Name (_ADR, 0x001C0005) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR09) /* \_SB_.AR09 */

}

Return (PR09) /* \_SB_.PR09 */

}

}

Device (GBEC)

{

Name (_ADR, 0x00190000) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0D, 0x04))

}

}

Device (USB0)

{

Name (_ADR, 0x001D0000) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x03, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"device-id",

Buffer (0x04)

{

0x34, 0x3A, 0x00, 0x00 /* 4:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"UHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (USB1)

{

Name (_ADR, 0x001D0001) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x04, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"device-id",

Buffer (0x04)

{

0x35, 0x3A, 0x00, 0x00 /* 5:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"UHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (USB2)

{

Name (_ADR, 0x001D0002) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0C, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"device-id",

Buffer (0x04)

{

0x36, 0x3A, 0x00, 0x00 /* 6:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"UHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (USB3)

{

Name (_ADR, 0x001D0003) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x20, 0x04))

}

}

Device (USB4)

{

Name (_ADR, 0x001A0000) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x0E, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"device-id",

Buffer (0x04)

{

0x37, 0x3A, 0x00, 0x00 /* 7:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"UHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (USB5)

{

Name (_ADR, 0x001A0001) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x05, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"device-id",

Buffer (0x04)

{

0x38, 0x3A, 0x00, 0x00 /* 8:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"UHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (USB6)

{

Name (_ADR, 0x001A0002) // _ADR: Address

OperationRegion (BAR0, PCI_Config, 0xC4, One)

Field (BAR0, ByteAcc, NoLock, Preserve)

{

USBW, 2,

Offset (0x01)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

If ((OSFL () == One) || (OSFL () == 0x02))

{

Return (0x02)

}

Else

{

Return (0x03)

}

}

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

If (Arg0)

{

USBW = 0x03

}

Else

{

USBW = Zero

}

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x20, 0x04))

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"device-id",

Buffer (0x04)

{

0x39, 0x3A, 0x00, 0x00 /* 9:.. */

},

"built-in",

Buffer (0x01)

{

0x00 /* . */

},

"device_type",

Buffer (0x05)

{

"UHCI"

},

"AAPL,clock-id",

Buffer (0x01)

{

0x00 /* . */

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

Device (P0P4)

{

Name (_ADR, 0x001C0000) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR04) /* \_SB_.AR04 */

}

Return (PR04) /* \_SB_.PR04 */

}

}

Device (SBUS)

{

Name (_ADR, 0x001F0003) // _ADR: Address

Device (BUS0)

{

Name (_CID, "smbus") // _CID: Compatible ID

Name (_ADR, Zero) // _ADR: Address

Device (DVL0)

{

Name (_ADR, 0x57) // _ADR: Address

Name (_CID, "diagsvault") // _CID: Compatible ID

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x02)

{

"address",

0x57

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Local0 = Package (0x08)

{

"built-in",

Buffer (One)

{

0x01 /* . */

},

"device-id",

Buffer (0x04)

{

0x30, 0x3A, 0x00, 0x00 /* 0:.. */

},

"model",

Buffer (0x1B)

{

"Intel 82801JI ICH10 Family"

},

"name",

Buffer (0x11)

{

"SMBus controller"

}

}

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}

}

Scope (\_GPE)

{

Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.P0P2, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P3, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P5, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P6, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P7, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P8, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P9, 0x02) // Device Wake

Notify (\_SB.PCI0.P0P4, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.P0P1, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L1D, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

\_SB.PCI0.SBRG.SIOH ()

}

Method (_L0F, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

\_SB.PCI0.SBRG.SIOH ()

}

Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.EUSB, 0x02) // Device Wake

Notify (\_SB.PCI0.USBE, 0x02) // Device Wake

Notify (\_SB.PCI0.GBEC, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.USB0, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.USB1, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.USB2, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L20, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.USB3, 0x02) // Device Wake

Notify (\_SB.PCI0.USB6, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.USB4, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.USB5, 0x02) // Device Wake

Notify (\_SB.PWRB, 0x02) // Device Wake

}

}

Device (PNLF)

{

Name (_HID, EisaId ("APP0002")) // _HID: Hardware ID

Name (_CID, "backlight") // _CID: Compatible ID

Name (_UID, 0x0A) // _UID: Unique ID

Name (_STA, 0x0B) // _STA: Status

}

Device (PWRB)

{

Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID

Name (_UID, 0xAA) // _UID: Unique ID

Name (_STA, 0x0B) // _STA: Status

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (G0T0, Package (0x07)

{

0x00060000,

"AP version",

0x40000000,

Zero,

Zero,

One,

0x02

})

Name (G0T1, Package (0x07)

{

0x00060001,

"Feature flag",

0x40000000,

Zero,

Zero,

One,

0x08

})

Name (G0T2, Package (0x07)

{

0x00070002,

"ASAP function",

0x40000000,

Zero,

Zero,

Zero,

0x02

})

Name (G0T3, Package (0x07)

{

0x00070003,

"AMD Cool&Quiet",

0x20000000,

Zero,

Zero,

Zero,

0x02

})

Name (GRP0, Package (0x04)

{

G0T0,

G0T1,

G0T2,

G0T3

})

Method (GIT0, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

ASB1 = Zero

}

ElseIf (_T_0 == One)

{

ASB1 = One

}

ElseIf (_T_0 == 0x02)

{

ASB1 = 0x02

}

ElseIf (_T_0 == 0x03)

{

ASB1 = 0x03

}

Else

{

ASB0 = Zero

}

}

Method (SIT0, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

DBG8 = 0x0300

}

ElseIf (_T_0 == One)

{

DBG8 = 0x0301

}

ElseIf (_T_0 == 0x02)

{

DBG8 = 0x0302

}

ElseIf (_T_0 == 0x03)

{

DBG8 = 0x0303

}

Else

{

ASB0 = Zero

}

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (G3T0, Package (0x07)

{

0x03010011,

"CPU Frequency",

Zero,

Zero,

0x4E20,

0x64,

0x0259

})

Name (G3T2, Package (0x07)

{

0x03060013,

"CPU Ratio",

Zero,

Zero,

0x06,

One,

0x19

})

Name (G321, Package (0x09)

{

0x03820032,

"DRAM Voltage",

Zero,

Zero,

0x0708,

0x14,

0x40,

One,

"Auto"

})

Name (G322, Package (0x0F)

{

0x03080031,

"DRAM Frequency",

Zero,

Zero,

0x0A,

"Auto",

"667 MHz",

"800 MHz",

"833 MHz",

"1000 MHz",

"1066 MHz",

"1111 MHz",

"1333 MHz",

"1600 MHz",

"1800 MHz"

})

Name (G340, Package (0x07)

{

0x03010051,

"PCIE Frequency",

Zero,

Zero,

0x2710,

0x64,

0x51

})

Name (GRP3, Package (0x05)

{

G3T0,

G3T2,

G321,

G322,

G340

})

Name (IDEX, Zero)

Method (GIT3, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x11)

{

If (GNVS (0x3523) == Zero)

{

ASB1 = (GNVS (0xA7A0) - 0xC8)

}

Else

{

ASB1 = DerefOf (G3T0 [0x03])

}

}

ElseIf (_T_0 == 0x13)

{

If ((Local0 = (GCAX (One) & 0x0FF0)) > 0x06F0)

{

Local0 = GMAX (0x2C)

Local2 = ((Local0 >> 0x08) & 0xFF)

Local1 = (Local0 & 0xFF)

Local0 = (Local1 - Local2)

Local7 = GMDX (0x0198)

Local7 = ((Local7 >> 0x08) & 0xFF)

If (Local7 < Local0)

{

Local7 = Local1

}

}

Else

{

Local0 = GMDX (0x0198)

Local1 = ((Local0 >> 0x08) & 0x1F)

Local7 = Local1

Local0 = GMAX (0x0198)

Local0 = ((Local0 >> 0x18) & 0x1F)

}

If (GNVS (0x8298) == Zero)

{

If (GMAX (0x17) & 0x00800000)

{

Local5 = ((GMAX (0x17) & 0x4000) >> 0x0E)

Local4 = (Local7 - Local0)

Local6 = (Local4 * 0x02)

ASB1 = (Local6 + Local5)

}

Else

{

ASB1 = ((Local7 - Local0) >> One)

}

}

Else

{

Local0 *= 0x02

If (GMAX (0x17) & 0x00800000)

{

ASB1 = ((GNVS (0x8298) & 0xFF) - Local0)

}

Else

{

ASB1 = ((GNVS (0x8298) & 0xFF) - Local0)

ASB1 >>= One

}

}

IDEX = ASB1 /* \_SB_.PCI0.SBRG.ASOC.ASB1 */

}

ElseIf (_T_0 == 0x32)

{

ASB1 = GNVS (0x7330)

}

ElseIf (_T_0 == 0x31)

{

ASB1 = GNVS (0x44BC)

}

ElseIf (_T_0 == 0x51)

{

ASB1 = (GNVS (0x8310) - 0x64)

}

Else

{

ASB0 = Zero

}

}

Method (SIT3, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x11)

{

If (GNVS (0x3523) == Zero)

{

Local3 = (GNVS (0xA7A0) - 0xC8)

}

Else

{

Local3 = DerefOf (G3T0 [0x03])

}

If (Local3 != Arg1)

{

Local2 = (Arg1 + 0xC8)

CLKR = RBLK (0xD2, Zero, 0x13)

CreateByteField (CLKR, Zero, CB00)

CreateWordField (CLKR, 0x0B, CBMN)

Local0 = (Arg1 * 0x03)

CreateByteField (MNBF, Local0, MN00)

CreateWordField (MNBF, Local0++, MNVL)

If (DerefOf (G3TB [(CB00 & 0x07)]) == MN00)

{

If (Arg2 & One)

{

CBMN = MNVL /* \_SB_.PCI0.SBRG.ASOC.SIT3.MNVL */

WBLK (0xD2, Zero, 0x13, CLKR)

}

}

Else

{

ASB0 |= 0x02

}

If (Arg2 & One)

{

SNVS (0xA7A0, Local2)

}

}

}

ElseIf (_T_0 == 0x13)

{

If (IDEX != Arg1)

{

If (Arg2 & One)

{

SNVS (0x1769, 0x04)

If ((Local0 = (GCAX (One) & 0x0FF0)) > 0x06F0)

{

Local0 = GMAX (0x2C)

Local2 = ((Local0 >> 0x08) & 0xFF)

Local1 = (Local0 & 0xFF)

Local3 = (Local1 - Local2)

}

Else

{

Local0 = GMDX (0x0198)

Local1 = ((Local0 >> 0x08) & 0x1F)

Local0 = GMAX (0x0198)

Local3 = ((Local0 >> 0x18) & 0x1F)

}

Local3 *= 0x02

If (GMAX (0x17) & 0x00800000)

{

Arg1 += Local3

}

Else

{

Arg1 *= 0x02

Arg1 += Local3

}

SNVS (0x8298, Arg1)

}

ASB0 |= 0x02

}

}

ElseIf (_T_0 == 0x32)

{

If (GNVS (0x7330) != Arg1)

{

If (Arg1 == Zero)

{

ASB0 |= 0x02

}

ElseIf (Arg2 & One)

{

Local1 = (Arg1 - One)

SDRV (Local1)

}

If (Arg2 & One)

{

SNVS (0x7330, Arg1)

}

}

}

ElseIf (_T_0 == 0x31)

{

If (GNVS (0x44BC) != Arg1)

{

If (Arg2 & One)

{

SNVS (0x44BC, Arg1)

}

ASB0 |= 0x02

}

}

ElseIf (_T_0 == 0x51)

{

Local0 = (Arg1 << One)

Arg1 += 0x64

If (GNVS (0x8310) != Arg1)

{

CreateByteField (CLKR, 0x0F, CB15)

CreateByteField (CLKR, 0x10, CB16)

CLKR = RBLK (0xD2, Zero, 0x13)

CreateByteField (PCEF, Local0, PC15)

CreateByteField (PCEF, Local0++, PC16)

If ((CB16 != PC16) | (CB15 != PC15))

{

If (Arg2 & One)

{

CB15 = PC15 /* \_SB_.PCI0.SBRG.ASOC.SIT3.PC15 */

CB16 = PC16 /* \_SB_.PCI0.SBRG.ASOC.SIT3.PC16 */

If (GNVS (0x3523) == Zero)

{

WBLK (0xD2, Zero, 0x13, CLKR)

}

SNVS (0x8310, Arg1)

}

}

}

}

Else

{

ASB0 = Zero

}

}

Method (SDRV, 1, NotSerialized)

{

WBYT (0x3C, 0x10, Arg0)

WBYT (0x3C, 0x11, One)

WBYT (0x3C, 0x12, One)

WBYT (0x3C, 0x40, 0x02)

Return (One)

}

Name (CLKR, Buffer (0x18)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ........ */

})

Name (G3TB, Buffer (0x08)

{

0x02, 0xFF, 0x04, 0xFF, 0x02, 0xFF, 0x02, 0xFF /* ........ */

})

Name (PCEF, Buffer (0xA2)

{

/* 0000 */ 0xDB, 0xEB, 0x16, 0xC2, 0xD8, 0xD5, 0x1C, 0xFC, /* ........ */

/* 0008 */ 0xD6, 0xC7, 0x59, 0xE5, 0x1B, 0xFA, 0x93, 0xB1, /* ..Y..... */

/* 0010 */ 0xD9, 0xEB, 0xCF, 0x8E, 0x98, 0xE6, 0xD1, 0xA4, /* ........ */

/* 0018 */ 0x5A, 0xFE, 0x4D, 0x80, 0x50, 0x9F, 0x19, 0xFB, /* Z.M.P... */

/* 0020 */ 0x59, 0xFD, 0xD6, 0xE0, 0x58, 0xF7, 0x50, 0xA6, /* Y...X.P. */

/* 0028 */ 0x96, 0xE6, 0x17, 0xF3, 0x17, 0xF5, 0x56, 0xEC, /* ......V. */

/* 0030 */ 0x17, 0xF9, 0x17, 0xFB, 0x57, 0xFD, 0xD4, 0xDD, /* ....W... */

/* 0038 */ 0x94, 0xDF, 0x54, 0xE1, 0x14, 0xE3, 0xD4, 0xE4, /* ..T..... */

/* 0040 */ 0x94, 0xE6, 0x54, 0xE8, 0x8F, 0xAF, 0xD4, 0xEB, /* ..T..... */

/* 0048 */ 0x4E, 0xA6, 0x53, 0xE3, 0xCF, 0xB4, 0x8B, 0x85, /* N.S..... */

/* 0050 */ 0x53, 0xE8, 0x54, 0xF6, 0xD1, 0xD2, 0xD0, 0xC7, /* S.T..... */

/* 0058 */ 0xD1, 0xD5, 0x4B, 0x8B, 0x14, 0xFF, 0x51, 0xDA, /* ..K...Q. */

/* 0060 */ 0x93, 0xF5, 0x53, 0xF7, 0x4D, 0xAA, 0x4D, 0xAB, /* ..S.M.M. */

/* 0068 */ 0xD2, 0xEE, 0x4F, 0xC8, 0x10, 0xD7, 0x0F, 0xCB, /* ..O..... */

/* 0070 */ 0x4F, 0xCC, 0xD2, 0xF6, 0x91, 0xEA, 0xD2, 0xF9, /* O....... */

/* 0078 */ 0x90, 0xDF, 0x38, 0x28, 0x3A, 0x64, 0x32, 0x87, /* ..8(:d2. */

/* 0080 */ 0x7C, 0xAB, 0xF6, 0x05, 0xF6, 0x05, 0x64, 0x07, /* |.....d. */

/* 0088 */ 0x3C, 0xC6, 0x3C, 0xC6, 0x3C, 0xC6, 0xFE, 0x06, /* <.<.<... */

/* 0090 */ 0xF6, 0x25, 0xB6, 0x26, 0x76, 0x2B, 0x3A, 0xA6, /* .%.&v+:. */

/* 0098 */ 0x3C, 0xE6, 0x7E, 0x26, 0x8C, 0xBA, 0x10, 0xFA, /* <.~&.... */

/* 00A0 */ 0x8C, 0xBC /* .. */

})

Name (MNBF, Buffer (0x070B)

{

/* 0000 */ 0x04, 0x64, 0xFC, 0x04, 0x5F, 0xDA, 0x04, 0xA1, /* .d.._... */

/* 0008 */ 0xE9, 0x04, 0xE2, 0xF1, 0x04, 0x98, 0xAB, 0x04, /* ........ */

/* 0010 */ 0x5D, 0xD0, 0x04, 0x5D, 0xD1, 0x04, 0x23, 0xFE, /* ]..]..#. */

/* 0018 */ 0x04, 0x15, 0x99, 0x04, 0x1C, 0xCD, 0x04, 0x5A, /* .......Z */

/* 0020 */ 0xBF, 0x04, 0xA0, 0xEC, 0x04, 0xA2, 0xFC, 0x04, /* ........ */

/* 0028 */ 0xD3, 0x8D, 0x04, 0x22, 0xFF, 0x04, 0xD8, 0xB4, /* ...".... */

/* 0030 */ 0x04, 0xD3, 0x8F, 0x04, 0x60, 0xF3, 0x04, 0x21, /* ....`..! */

/* 0038 */ 0xFC, 0x04, 0xA0, 0xF5, 0x04, 0x57, 0xB1, 0x02, /* .....W.. */

/* 0040 */ 0xA7, 0x96, 0x02, 0x7F, 0xF4, 0x02, 0xA1, 0x80, /* ........ */

/* 0048 */ 0x02, 0xBE, 0xF2, 0x02, 0xB1, 0xC0, 0x02, 0x73, /* .......s */

/* 0050 */ 0xC9, 0x02, 0xFE, 0xF5, 0x02, 0x35, 0xD3, 0x02, /* .....5.. */

/* 0058 */ 0x35, 0xD4, 0x02, 0x3E, 0xF9, 0x02, 0xF4, 0xD1, /* 5..>.... */

/* 0060 */ 0x02, 0xB1, 0xC6, 0x02, 0x7E, 0xFC, 0x02, 0xE0, /* ....~... */

/* 0068 */ 0x82, 0x02, 0x3A, 0xEE, 0x02, 0x7C, 0xF7, 0x02, /* ..:..|.. */

/* 0070 */ 0xAF, 0xC2, 0x02, 0xBD, 0xFD, 0x02, 0x34, 0xD9, /* ......4. */

/* 0078 */ 0x02, 0x7B, 0xF7, 0x02, 0xEA, 0xB0, 0x02, 0x69, /* .{.....i */

/* 0080 */ 0xAD, 0x02, 0xE4, 0x98, 0x02, 0x6F, 0xC8, 0x02, /* .....o.. */

/* 0088 */ 0x36, 0xE7, 0x02, 0x77, 0xEC, 0x02, 0xB8, 0xF1, /* 6..w.... */

/* 0090 */ 0x02, 0xB8, 0xF2, 0x02, 0x2E, 0xC8, 0x02, 0x34, /* .......4 */

/* 0098 */ 0xE3, 0x02, 0x60, 0x8C, 0x02, 0x37, 0xF2, 0x02, /* ..`..7.. */

/* 00A0 */ 0x37, 0xF3, 0x02, 0xB6, 0xEF, 0x02, 0xE5, 0xA4, /* 7....... */

/* 00A8 */ 0x02, 0xB2, 0xDF, 0x02, 0xA8, 0xB3, 0x02, 0x72, /* .......r */

/* 00B0 */ 0xE1, 0x02, 0x78, 0xFD, 0x02, 0x32, 0xE3, 0x02, /* ..x..2.. */

/* 00B8 */ 0xF0, 0xDA, 0x02, 0xF2, 0xE4, 0x02, 0x6E, 0xD3, /* ......n. */

/* 00C0 */ 0x02, 0x29, 0xBD, 0x02, 0xB7, 0xFE, 0x02, 0x36, /* .).....6 */

/* 00C8 */ 0xFC, 0x02, 0xEC, 0xCD, 0x02, 0xB6, 0xFD, 0x02, /* ........ */

/* 00D0 */ 0xE0, 0x96, 0x02, 0xA3, 0xA5, 0x02, 0xB5, 0xFB, /* ........ */

/* 00D8 */ 0x02, 0x65, 0xB0, 0x02, 0x71, 0xEA, 0x02, 0xDF, /* .e..q... */

/* 00E0 */ 0x94, 0x02, 0x26, 0xB7, 0x02, 0xB3, 0xF6, 0x02, /* ..&..... */

/* 00E8 */ 0x74, 0xFC, 0x02, 0x64, 0xAF, 0x02, 0xB0, 0xEA, /* t..d.... */

/* 00F0 */ 0x02, 0x71, 0xF0, 0x02, 0xB0, 0xEB, 0x02, 0xAE, /* .q...... */

/* 00F8 */ 0xE2, 0x02, 0x6F, 0xE8, 0x02, 0x31, 0xF3, 0x02, /* ..o..1.. */

/* 0100 */ 0x2A, 0xD1, 0x02, 0xE8, 0xC7, 0x02, 0xAC, 0xDC, /* *....... */

/* 0108 */ 0x02, 0x23, 0xB0, 0x02, 0xE6, 0xBF, 0x02, 0x2F, /* .#...../ */

/* 0110 */ 0xEE, 0x02, 0x25, 0xBC, 0x02, 0x61, 0xA8, 0x02, /* ..%..a.. */

/* 0118 */ 0x5C, 0x8F, 0x02, 0x2D, 0xE7, 0x02, 0x70, 0xF7, /* \..-..p. */

/* 0120 */ 0x02, 0x71, 0xFD, 0x02, 0x67, 0xCA, 0x02, 0xA0, /* .q..g... */

/* 0128 */ 0xA6, 0x02, 0xA2, 0xB1, 0x02, 0x2A, 0xDC, 0x02, /* .....*.. */

/* 0130 */ 0x6C, 0xE7, 0x02, 0xEB, 0xE2, 0x02, 0xE5, 0xC3, /* l....... */

/* 0138 */ 0x02, 0x6B, 0xE4, 0x02, 0x2B, 0xE5, 0x02, 0x23, /* .k..+..# */

/* 0140 */ 0xBB, 0x02, 0x62, 0xB6, 0x02, 0x2D, 0xF2, 0x02, /* ..b..-.. */

/* 0148 */ 0x2B, 0xE8, 0x02, 0xEB, 0xE8, 0x02, 0xAB, 0xE9, /* +....... */

/* 0150 */ 0x02, 0x6B, 0xEA, 0x02, 0x2B, 0xEB, 0x02, 0xEB, /* .k..+... */

/* 0158 */ 0xEB, 0x02, 0x2C, 0xF2, 0x02, 0x6B, 0xED, 0x02, /* ..,..k.. */

/* 0160 */ 0x2B, 0xEE, 0x02, 0xEB, 0xEE, 0x02, 0xAB, 0xEF, /* +....... */

/* 0168 */ 0x02, 0x6B, 0xF0, 0x02, 0xDF, 0xAD, 0x02, 0x2D, /* .k.....- */

/* 0170 */ 0xFD, 0x02, 0xE2, 0xBF, 0x02, 0x23, 0xC6, 0x02, /* .....#.. */

/* 0178 */ 0x2B, 0xF4, 0x02, 0xEB, 0xF4, 0x02, 0x65, 0xD3, /* +.....e. */

/* 0180 */ 0x02, 0x6B, 0xF6, 0x02, 0xEC, 0xFC, 0x02, 0x2A, /* .k.....* */

/* 0188 */ 0xF2, 0x02, 0xA2, 0xC4, 0x02, 0xA0, 0xB9, 0x02, /* ........ */

/* 0190 */ 0x62, 0xC6, 0x02, 0xDC, 0xA3, 0x02, 0xA9, 0xF0, /* b....... */

/* 0198 */ 0x02, 0x9E, 0xB0, 0x02, 0xEB, 0xFD, 0x02, 0xAB, /* ........ */

/* 01A0 */ 0xFE, 0x02, 0x1F, 0xB8, 0x02, 0xA0, 0xBE, 0x02, /* ........ */

/* 01A8 */ 0x22, 0xCB, 0x02, 0xA9, 0xF5, 0x02, 0x6A, 0xFC, /* ".....j. */

/* 01B0 */ 0x02, 0xE1, 0xC6, 0x02, 0x5F, 0xBB, 0x02, 0x67, /* ...._..g */

/* 01B8 */ 0xEC, 0x02, 0x28, 0xF3, 0x02, 0x9B, 0xA4, 0x02, /* ..(..... */

/* 01C0 */ 0xD9, 0x98, 0x02, 0x69, 0xFB, 0x02, 0xE5, 0xE2, /* ...i.... */

/* 01C8 */ 0x02, 0x64, 0xDD, 0x02, 0x5A, 0xA0, 0x02, 0x5D, /* .d..Z..] */

/* 01D0 */ 0xB3, 0x02, 0xDD, 0xB3, 0x02, 0xD6, 0x88, 0x02, /* ........ */

/* 01D8 */ 0x1E, 0xBB, 0x02, 0x28, 0xFA, 0x02, 0x9C, 0xAF, /* ...(.... */

/* 01E0 */ 0x02, 0x1C, 0xB0, 0x02, 0x21, 0xD0, 0x02, 0xA7, /* ....!... */

/* 01E8 */ 0xF6, 0x02, 0xA5, 0xEA, 0x02, 0xA6, 0xF1, 0x02, /* ........ */

/* 01F0 */ 0xA7, 0xF8, 0x02, 0xD9, 0x9F, 0x02, 0xA6, 0xF3, /* ........ */

/* 01F8 */ 0x02, 0xDE, 0xC0, 0x02, 0xA3, 0xE1, 0x02, 0x99, /* ........ */

/* 0200 */ 0xA1, 0x02, 0x96, 0x8E, 0x02, 0x67, 0xFD, 0x02, /* .....g.. */

/* 0208 */ 0x54, 0x82, 0x02, 0x59, 0xA3, 0x02, 0x65, 0xF2, /* T..Y..e. */

/* 0210 */ 0x02, 0x5B, 0xB1, 0x02, 0x24, 0xED, 0x02, 0x19, /* .[..$... */

/* 0218 */ 0xA5, 0x02, 0xE0, 0xD3, 0x02, 0x9A, 0xAC, 0x02, /* ........ */

/* 0220 */ 0x17, 0x99, 0x02, 0xDC, 0xBA, 0x02, 0x5C, 0xBB, /* ......\. */

/* 0228 */ 0x02, 0x96, 0x93, 0x02, 0x24, 0xF2, 0x02, 0xD8, /* ....$... */

/* 0230 */ 0xA1, 0x02, 0x64, 0xF3, 0x02, 0x1F, 0xD2, 0x02, /* ..d..... */

/* 0238 */ 0xA4, 0xF4, 0x02, 0x15, 0x8F, 0x02, 0x9A, 0xB1, /* ........ */

/* 0240 */ 0x02, 0x20, 0xDB, 0x02, 0x1D, 0xC7, 0x02, 0x5F, /* . ....._ */

/* 0248 */ 0xD5, 0x02, 0x1D, 0xC8, 0x02, 0x60, 0xDD, 0x02, /* .....`.. */

/* 0250 */ 0xE1, 0xE4, 0x02, 0x62, 0xEC, 0x02, 0x1E, 0xD1, /* ...b.... */

/* 0258 */ 0x02, 0x9F, 0xD8, 0x02, 0x24, 0xFC, 0x02, 0x9B, /* ....$... */

/* 0260 */ 0xBD, 0x02, 0xD5, 0x93, 0x02, 0x9C, 0xC5, 0x02, /* ........ */

/* 0268 */ 0xA3, 0xF7, 0x02, 0x9C, 0xC6, 0x02, 0xE3, 0xF8, /* ........ */

/* 0270 */ 0x02, 0x62, 0xF2, 0x02, 0x5E, 0xD6, 0x02, 0x61, /* .b..^..a */

/* 0278 */ 0xEC, 0x02, 0x22, 0xF4, 0x02, 0x5B, 0xC2, 0x02, /* .."..[.. */

/* 0280 */ 0x9A, 0xBB, 0x02, 0x98, 0xAD, 0x02, 0xA2, 0xF6, /* ........ */

/* 0288 */ 0x02, 0xD2, 0x82, 0x02, 0x20, 0xE9, 0x02, 0x5F, /* .... .._ */

/* 0290 */ 0xE2, 0x02, 0xE2, 0xF8, 0x02, 0x21, 0xF2, 0x02, /* .....!.. */

/* 0298 */ 0x60, 0xEB, 0x02, 0x13, 0x8C, 0x02, 0xE1, 0xF3, /* `....... */

/* 02A0 */ 0x02, 0x9A, 0xC0, 0x02, 0x13, 0x8D, 0x02, 0xA1, /* ........ */

/* 02A8 */ 0xF5, 0x02, 0xA2, 0xFD, 0x02, 0x13, 0x8E, 0x02, /* ........ */

/* 02B0 */ 0xDC, 0xD1, 0x02, 0x5E, 0xE1, 0x02, 0x5D, 0xDA, /* ...^..]. */

/* 02B8 */ 0x02, 0xDD, 0xDA, 0x02, 0xA1, 0xF9, 0x02, 0xA0, /* ........ */

/* 02C0 */ 0xF2, 0x02, 0x95, 0x9F, 0x02, 0x1F, 0xEC, 0x02, /* ........ */

/* 02C8 */ 0x97, 0xAF, 0x02, 0x9B, 0xCE, 0x02, 0x18, 0xB8, /* ........ */

/* 02D0 */ 0x02, 0xDA, 0xC7, 0x02, 0x1E, 0xE7, 0x02, 0x5F, /* ......._ */

/* 02D8 */ 0xEF, 0x02, 0x91, 0x83, 0x02, 0xE1, 0xFF, 0x02, /* ........ */

/* 02E0 */ 0x59, 0xC2, 0x02, 0xD4, 0x9B, 0x02, 0xE0, 0xF9, /* Y....... */

/* 02E8 */ 0x02, 0x9F, 0xF2, 0x02, 0x19, 0xC4, 0x02, 0x1C, /* ........ */

/* 02F0 */ 0xDC, 0x02, 0xDA, 0xCC, 0x02, 0x1C, 0xDB, 0x02, /* ........ */

/* 02F8 */ 0xD9, 0xC5, 0x02, 0xDF, 0xF5, 0x02, 0x12, 0x8F, /* ........ */

/* 0300 */ 0x02, 0x54, 0x9F, 0x02, 0x99, 0xC7, 0x02, 0x17, /* .T...... */

/* 0308 */ 0xB8, 0x02, 0x51, 0x88, 0x02, 0x1F, 0xF9, 0x02, /* ..Q..... */

/* 0310 */ 0x14, 0xA1, 0x02, 0x1E, 0xF2, 0x02, 0x5B, 0xDA, /* ......[. */

/* 0318 */ 0x02, 0xDB, 0xDA, 0x02, 0xD7, 0xBA, 0x02, 0x5F, /* ......._ */

/* 0320 */ 0xFC, 0x02, 0x1A, 0xD4, 0x02, 0xD0, 0x82, 0x02, /* ........ */

/* 0328 */ 0x9D, 0xED, 0x02, 0xD7, 0xBC, 0x02, 0x9D, 0xEE, /* ........ */

/* 0330 */ 0x02, 0x5E, 0xF7, 0x02, 0x5C, 0xE7, 0x02, 0x53, /* .^..\..S */

/* 0338 */ 0x9D, 0x02, 0x11, 0x8D, 0x02, 0x1D, 0xF1, 0x02, /* ........ */

/* 0340 */ 0x53, 0x9E, 0x02, 0x1A, 0xD9, 0x02, 0x16, 0xB8, /* S....... */

/* 0348 */ 0x02, 0x15, 0xB0, 0x02, 0xDB, 0xE2, 0x02, 0xD5, /* ........ */

/* 0350 */ 0xB0, 0x02, 0x1E, 0xFD, 0x02, 0xDA, 0xDB, 0x02, /* ........ */

/* 0358 */ 0x58, 0xCB, 0x02, 0xD2, 0x98, 0x02, 0x95, 0xB2, /* X....... */

/* 0360 */ 0x02, 0x98, 0xCC, 0x02, 0x1A, 0xDE, 0x02, 0x1B, /* ........ */

/* 0368 */ 0xE7, 0x02, 0xD8, 0xCD, 0x02, 0x16, 0xBD, 0x02, /* ........ */

/* 0370 */ 0x17, 0xC6, 0x02, 0x9C, 0xF1, 0x02, 0x1C, 0xF2, /* ........ */

/* 0378 */ 0x02, 0x9C, 0xF2, 0x02, 0x1C, 0xF3, 0x02, 0x17, /* ........ */

/* 0380 */ 0xC8, 0x02, 0x5B, 0xEB, 0x02, 0x59, 0xDA, 0x02, /* ..[..Y.. */

/* 0388 */ 0x18, 0xD2, 0x02, 0x50, 0x8C, 0x02, 0x17, 0xCA, /* ...P.... */

/* 0390 */ 0x02, 0x19, 0xDC, 0x02, 0x5A, 0xE5, 0x02, 0xDA, /* ....Z... */

/* 0398 */ 0xE5, 0x02, 0xD6, 0xC2, 0x02, 0xD9, 0xDD, 0x02, /* ........ */

/* 03A0 */ 0xD4, 0xB1, 0x02, 0x15, 0xBB, 0x02, 0xD0, 0x8E, /* ........ */

/* 03A8 */ 0x02, 0x99, 0xDF, 0x02, 0x17, 0xCE, 0x02, 0x94, /* ........ */

/* 03B0 */ 0xB3, 0x02, 0xDC, 0xFB, 0x02, 0x5A, 0xEA, 0x02, /* .....Z.. */

/* 03B8 */ 0xDC, 0xFC, 0x02, 0x5C, 0xFD, 0x02, 0x54, 0xB5, /* ...\..T. */

/* 03C0 */ 0x02, 0xD6, 0xC7, 0x02, 0xD2, 0xA3, 0x02, 0xD8, /* ........ */

/* 03C8 */ 0xDA, 0x02, 0x93, 0xAD, 0x02, 0xD9, 0xE4, 0x02, /* ........ */

/* 03D0 */ 0x9B, 0xF7, 0x02, 0x93, 0xAE, 0x02, 0x5A, 0xEF, /* ......Z. */

/* 03D8 */ 0x02, 0x58, 0xDD, 0x02, 0x93, 0xAF, 0x02, 0x92, /* .X...... */

/* 03E0 */ 0xA6, 0x02, 0x57, 0xD5, 0x02, 0x9A, 0xF1, 0x02, /* ..W..... */

/* 03E8 */ 0xD6, 0xCC, 0x02, 0xDB, 0xFB, 0x02, 0x96, 0xCD, /* ........ */

/* 03F0 */ 0x02, 0x57, 0xD7, 0x02, 0x56, 0xCE, 0x02, 0x5A, /* .W..V..Z */

/* 03F8 */ 0xF4, 0x02, 0xCE, 0x83, 0x02, 0x15, 0xC6, 0x02, /* ........ */

/* 0400 */ 0x57, 0xD9, 0x02, 0x9B, 0xFF, 0x02, 0x9A, 0xF6, /* W....... */

/* 0408 */ 0x02, 0x1A, 0xF7, 0x02, 0x50, 0x98, 0x02, 0x0F, /* ....P... */

/* 0410 */ 0x8F, 0x02, 0xD9, 0xEE, 0x02, 0x96, 0xD2, 0x02, /* ........ */

/* 0418 */ 0x5A, 0xF9, 0x02, 0x51, 0xA3, 0x02, 0x99, 0xF0, /* Z..Q.... */

/* 0420 */ 0x02, 0xD4, 0xC0, 0x02, 0xD5, 0xCA, 0x02, 0x9A, /* ........ */

/* 0428 */ 0xFB, 0x02, 0x95, 0xCB, 0x02, 0x18, 0xE9, 0x02, /* ........ */

/* 0430 */ 0x94, 0xC2, 0x02, 0x5A, 0xFD, 0x02, 0x58, 0xEA, /* ...Z..X. */

/* 0438 */ 0x02, 0x12, 0xB0, 0x02, 0x96, 0xD7, 0x02, 0x98, /* ........ */

/* 0440 */ 0xEB, 0x02, 0xD9, 0xF5, 0x02, 0x52, 0xB1, 0x02, /* .....R.. */

/* 0448 */ 0xD8, 0xEC, 0x02, 0x11, 0xA8, 0x02, 0x99, 0xF7, /* ........ */

/* 0450 */ 0x02, 0x18, 0xEE, 0x02, 0x97, 0xE4, 0x02, 0x15, /* ........ */

/* 0458 */ 0xD1, 0x02, 0x59, 0xF9, 0x02, 0xD3, 0xBD, 0x02, /* ..Y..... */

/* 0460 */ 0x19, 0xFA, 0x02, 0x97, 0xE6, 0x02, 0xD3, 0xBE, /* ........ */

/* 0468 */ 0x02, 0x56, 0xDD, 0x02, 0x94, 0xC9, 0x02, 0xD3, /* .V...... */

/* 0470 */ 0xBF, 0x02, 0xD0, 0xA1, 0x02, 0x18, 0xF3, 0x02, /* ........ */

/* 0478 */ 0xD3, 0xC0, 0x02, 0xD1, 0xAC, 0x02, 0x8E, 0x8E, /* ........ */

/* 0480 */ 0x02, 0xCE, 0x8E, 0x02, 0x95, 0xD6, 0x02, 0xD9, /* ........ */

/* 0488 */ 0xFF, 0x02, 0xD7, 0xEB, 0x02, 0x91, 0xAE, 0x02, /* ........ */

/* 0490 */ 0x56, 0xE2, 0x02, 0x14, 0xCE, 0x02, 0xCF, 0x9A, /* V....... */

/* 0498 */ 0x02, 0x50, 0xA5, 0x02, 0x11, 0xB9, 0x02, 0x11, /* .P...... */

/* 04A0 */ 0xE4, 0x02, 0xD4, 0xCF, 0x02, 0xD8, 0xF9, 0x02, /* ........ */

/* 04A8 */ 0x13, 0xC6, 0x02, 0x98, 0xFA, 0x02, 0x18, 0xFB, /* ........ */

/* 04B0 */ 0x02, 0x94, 0xD1, 0x02, 0xD8, 0xFB, 0x02, 0xD7, /* ........ */

/* 04B8 */ 0xF1, 0x02, 0x92, 0xBD, 0x02, 0x16, 0xE8, 0x02, /* ........ */

/* 04C0 */ 0x98, 0xFD, 0x02, 0xD6, 0xE8, 0x02, 0xD7, 0xF3, /* ........ */

/* 04C8 */ 0x02, 0x0D, 0x8A, 0x02, 0x8F, 0x9F, 0x02, 0x14, /* ........ */

/* 04D0 */ 0xD5, 0x02, 0xD6, 0xEA, 0x02, 0xD4, 0xD5, 0x02, /* ........ */

/* 04D8 */ 0x50, 0xAB, 0x02, 0x51, 0xB6, 0x02, 0x56, 0xEC, /* P..Q..V. */

/* 04E0 */ 0x02, 0x97, 0xF7, 0x02, 0x55, 0xE2, 0x02, 0x52, /* ....U..R */

/* 04E8 */ 0xC2, 0x02, 0xD1, 0xB7, 0x02, 0x17, 0xF9, 0x02, /* ........ */

/* 04F0 */ 0x90, 0xAD, 0x02, 0x92, 0xC3, 0x02, 0x57, 0xFA, /* ......W. */

/* 04F8 */ 0x02, 0xCC, 0x82, 0x02, 0x17, 0xFB, 0x02, 0xD2, /* ........ */

/* 0500 */ 0xC4, 0x02, 0x13, 0xD0, 0x02, 0x56, 0xF1, 0x02, /* .....V.. */

/* 0508 */ 0xCF, 0xA4, 0x02, 0x16, 0xF2, 0x02, 0x4E, 0x9A, /* ......N. */

/* 0510 */ 0x02, 0xD5, 0xE7, 0x02, 0x13, 0xD2, 0x02, 0x52, /* .......R */

/* 0518 */ 0xC7, 0x02, 0xD4, 0xDD, 0x02, 0x13, 0xD3, 0x02, /* ........ */

/* 0520 */ 0xD6, 0xF4, 0x02, 0x50, 0xB2, 0x02, 0x13, 0xD4, /* ...P.... */

/* 0528 */ 0x02, 0x94, 0xDF, 0x02, 0x8D, 0x91, 0x02, 0x13, /* ........ */

/* 0530 */ 0xD5, 0x02, 0x16, 0xF7, 0x02, 0x96, 0xF7, 0x02, /* ........ */

/* 0538 */ 0x54, 0xE1, 0x02, 0xD1, 0xBF, 0x02, 0x55, 0xED, /* T.....U. */

/* 0540 */ 0x02, 0x13, 0xD7, 0x02, 0x15, 0xEE, 0x02, 0x14, /* ........ */

/* 0548 */ 0xE3, 0x02, 0x8F, 0xAA, 0x02, 0x0D, 0x94, 0x02, /* ........ */

/* 0550 */ 0x52, 0xCD, 0x02, 0x56, 0xFB, 0x02, 0xD4, 0xE4, /* R..V.... */

/* 0558 */ 0x02, 0x16, 0xFC, 0x02, 0x92, 0xCE, 0x02, 0xD6, /* ........ */

/* 0560 */ 0xFC, 0x02, 0x56, 0xFD, 0x02, 0x15, 0xF2, 0x02, /* ..V..... */

/* 0568 */ 0xD2, 0xCF, 0x02, 0x91, 0xC4, 0x02, 0x8D, 0x96, /* ........ */

/* 0570 */ 0x02, 0x90, 0xB9, 0x02, 0x12, 0xD1, 0x02, 0x55, /* .......U */

/* 0578 */ 0xF4, 0x02, 0xCC, 0x8B, 0x02, 0x54, 0xE9, 0x02, /* .....T.. */

/* 0580 */ 0x8B, 0x80, 0x02, 0x8F, 0xAF, 0x02, 0xCF, 0xAF, /* ........ */

/* 0588 */ 0x02, 0x0F, 0xB0, 0x02, 0xD5, 0xF6, 0x02, 0x0D, /* ........ */

/* 0590 */ 0x99, 0x02, 0x95, 0xF7, 0x02, 0x4E, 0xA5, 0x02, /* .....N.. */

/* 0598 */ 0x55, 0xF8, 0x02, 0x51, 0xC9, 0x02, 0x53, 0xE1, /* U..Q..S. */

/* 05A0 */ 0x02, 0x4E, 0xA6, 0x02, 0x50, 0xBE, 0x02, 0x53, /* .N..P..S */

/* 05A8 */ 0xE2, 0x02, 0x94, 0xEE, 0x02, 0x4D, 0x9B, 0x02, /* .....M.. */

/* 05B0 */ 0x53, 0xE3, 0x02, 0xCB, 0x83, 0x02, 0x14, 0xF0, /* S....... */

/* 05B8 */ 0x02, 0x53, 0xE4, 0x02, 0x90, 0xC0, 0x02, 0x15, /* .S...... */

/* 05C0 */ 0xFD, 0x02, 0x53, 0xE5, 0x02, 0xD5, 0xFD, 0x02, /* ..S..... */

/* 05C8 */ 0x14, 0xF2, 0x02, 0x11, 0xCE, 0x02, 0xCD, 0x9D, /* ........ */

/* 05D0 */ 0x02, 0xD2, 0xDA, 0x02, 0x53, 0xE7, 0x02, 0x4C, /* ....S..L */

/* 05D8 */ 0x92, 0x02, 0x4B, 0x86, 0x02, 0x12, 0xDC, 0x02, /* ..K..... */

/* 05E0 */ 0xD4, 0xF4, 0x02, 0x54, 0xF5, 0x02, 0x94, 0xF5, /* ...T.... */

/* 05E8 */ 0x02, 0x52, 0xDD, 0x02, 0x51, 0xD1, 0x02, 0x4D, /* .R..Q..M */

/* 05F0 */ 0xA0, 0x02, 0x90, 0xC5, 0x02, 0x54, 0xF7, 0x02, /* .....T.. */

/* 05F8 */ 0x53, 0xEB, 0x02, 0xD1, 0xD2, 0x02, 0x54, 0xF8, /* S.....T. */

/* 0600 */ 0x02, 0xCB, 0x88, 0x02, 0x14, 0xF9, 0x02, 0x0F, /* ........ */

/* 0608 */ 0xBB, 0x02, 0xD0, 0xC7, 0x02, 0x14, 0xFA, 0x02, /* ........ */

/* 0610 */ 0xCD, 0xA2, 0x02, 0xD4, 0xFA, 0x02, 0xCE, 0xAF, /* ........ */

/* 0618 */ 0x02, 0x0E, 0xB0, 0x02, 0x4E, 0xB0, 0x02, 0x8E, /* ....N... */

/* 0620 */ 0xB0, 0x02, 0x94, 0xFC, 0x02, 0x50, 0xCA, 0x02, /* .....P.. */

/* 0628 */ 0x4B, 0x8B, 0x02, 0x91, 0xD7, 0x02, 0x92, 0xE4, /* K....... */

/* 0630 */ 0x02, 0x4D, 0xA5, 0x02, 0xCC, 0x98, 0x02, 0x14, /* .M...... */

/* 0638 */ 0xFF, 0x02, 0xD2, 0xE5, 0x02, 0x90, 0xCC, 0x02, /* ........ */

/* 0640 */ 0x0F, 0xC0, 0x02, 0x93, 0xF3, 0x02, 0x12, 0xE7, /* ........ */

/* 0648 */ 0x02, 0xCF, 0xC0, 0x02, 0x93, 0xF4, 0x02, 0xCB, /* ........ */

/* 0650 */ 0x8D, 0x02, 0x52, 0xE8, 0x02, 0x93, 0xF5, 0x02, /* ..R..... */

/* 0658 */ 0x10, 0xCF, 0x02, 0x51, 0xDC, 0x02, 0x93, 0xF6, /* ...Q.... */

/* 0660 */ 0x02, 0xD3, 0xF6, 0x02, 0x53, 0xF7, 0x02, 0x4A, /* ....S..J */

/* 0668 */ 0x82, 0x02, 0xD2, 0xEA, 0x02, 0x11, 0xDE, 0x02, /* ........ */

/* 0670 */ 0x50, 0xD1, 0x02, 0x4D, 0xAA, 0x02, 0x0A, 0x83, /* P..M.... */

/* 0678 */ 0x02, 0x93, 0xF9, 0x02, 0x8B, 0x90, 0x02, 0x13, /* ........ */

/* 0680 */ 0xFA, 0x02, 0x4D, 0xAB, 0x02, 0x0F, 0xC6, 0x02, /* ..M..... */

/* 0688 */ 0x13, 0xFB, 0x02, 0xD0, 0xD3, 0x02, 0xCF, 0xC6, /* ........ */

/* 0690 */ 0x02, 0x13, 0xFC, 0x02, 0xD1, 0xE1, 0x02, 0xD0, /* ........ */

/* 0698 */ 0xD4, 0x02, 0x13, 0xFD, 0x02, 0xCE, 0xBA, 0x02, /* ........ */

/* 06A0 */ 0x0E, 0xBB, 0x02, 0x13, 0xFE, 0x02, 0xCF, 0xC8, /* ........ */

/* 06A8 */ 0x02, 0x8B, 0x93, 0x02, 0x51, 0xE4, 0x02, 0x12, /* ....Q... */

/* 06B0 */ 0xF2, 0x02, 0x0D, 0xAF, 0x02, 0x92, 0xF2, 0x02, /* ........ */

/* 06B8 */ 0x91, 0xE5, 0x02, 0x52, 0xF3, 0x02, 0x90, 0xD8, /* ...R.... */

/* 06C0 */ 0x02, 0xD2, 0xF3, 0x02, 0x91, 0xE6, 0x02, 0x92, /* ........ */

/* 06C8 */ 0xF4, 0x02, 0x90, 0xD9, 0x02, 0x12, 0xF5, 0x02, /* ........ */

/* 06D0 */ 0x0B, 0x96, 0x02, 0x8D, 0xB1, 0x02, 0x4B, 0x96, /* ......K. */

/* 06D8 */ 0x02, 0x4C, 0xA4, 0x02, 0x11, 0xE9, 0x02, 0x0E, /* .L...... */

/* 06E0 */ 0xC0, 0x02, 0x4E, 0xC0, 0x02, 0x4F, 0xCE, 0x02, /* ..N..O.. */

/* 06E8 */ 0xCA, 0x89, 0x02, 0x91, 0xEA, 0x02, 0x92, 0xF8, /* ........ */

/* 06F0 */ 0x02, 0x50, 0xDD, 0x02, 0x51, 0xEB, 0x02, 0x8B, /* .P..Q... */

/* 06F8 */ 0x98, 0x02, 0xD2, 0xF9, 0x02, 0xCB, 0x98, 0x02, /* ........ */

/* 0700 */ 0xCF, 0xD0, 0x02, 0x0D, 0xB5, 0x02, 0x4F, 0xD1, /* ......O. */

/* 0708 */ 0x02, 0x90, 0xDF /* ... */

})

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (G4T0, Package (0x04)

{

0x04070010,

"CPU Q-FAN Control",

0x80000000,

Zero

})

Name (G4T1, Package (0x08)

{

0x04080011,

"CPU Q-FAN Profile",

0x00100001,

Zero,

0x03,

"Optimal",

"Silent",

"Performance"

})

Name (G4T2, Package (0x07)

{

0x04030017,

"CPU T-Control reference",

0x40000000,

Zero,

Zero,

One,

0x64

})

Name (G420, Package (0x04)

{

0x04070070,

"Chassis Q-FAN Control",

0x80000000,

Zero

})

Name (G421, Package (0x08)

{

0x04080071,

"Chassis Q-FAN Profile",

0x00710001,

Zero,

0x03,

"Optimal",

"Silent",

"Performance"

})

Name (GRP4, Package (0x05)

{

G4T0,

G4T1,

G4T2,

G420,

G421

})

Method (GIT4, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x10)

{

ASB1 = GNVS (0x174C)

}

ElseIf (_T_0 == 0x11)

{

ASB1 = GNVS (0x26B2)

}

ElseIf (_T_0 == 0x17)

{

Local0 = GNVS (0x454C)

ASB1 = ((Local0 << One) + 0x28)

}

ElseIf (_T_0 == 0x70)

{

ASB1 = GNVS (0x174D)

}

ElseIf (_T_0 == 0x71)

{

ASB1 = GNVS (0x26B4)

}

Else

{

ASB0 = Zero

}

}

Method (SIT4, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x10)

{

If (GNVS (0x174C) != Arg1)

{

If (Arg2 & One)

{

SNVS (0x174C, Arg1)

}

ASB0 |= 0x02

}

}

ElseIf (_T_0 == 0x11)

{

If (GNVS (0x26B2) != Arg1)

{

If (Arg2 & One)

{

SNVS (0x26B2, Arg1)

}

ASB0 |= 0x02

}

}

ElseIf (_T_0 == 0x70)

{

If (GNVS (0x174D) != Arg1)

{

If (Arg2 & One)

{

SNVS (0x174D, Arg1)

}

ASB0 |= 0x02

}

}

ElseIf (_T_0 == 0x71)

{

If (GNVS (0x26B4) != Arg1)

{

If (Arg2 & One)

{

SNVS (0x26B4, Arg1)

}

ASB0 |= 0x02

}

}

Else

{

ASB0 = Zero

}

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (G5T0, Package (0x07)

{

0x05080000,

"AI Profile",

Zero,

Zero,

0x02,

"Auto",

Zero

})

Name (GRP5, Package (0x01)

{

G5T0

})

Method (GIT5, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

ASB1 = One

}

Else

{

ASB0 = Zero

}

}

Method (SIT5, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

ASB0 = 0x03

}

Else

{

ASB0 = Zero

}

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (G6T1, Package (0x07)

{

0x06020011,

"Vcore Voltage",

0x20000000,

Zero,

0x0352,

0x02EE,

0x02

})

Name (G6T2, Package (0x07)

{

0x06030012,

"CPU Temperature",

0x20000000,

Zero,

0x0258,

0x015E,

0x02

})

Name (G6T3, Package (0x07)

{

0x06040013,

"CPU FAN Speed",

0x20000000,

Zero,

0x0258,

0x1900,

0x02

})

Name (G6T4, Package (0x07)

{

0x06040073,

"Chassis FAN Speed",

0x20000000,

Zero,

0x0258,

0x1900,

0x02

})

Name (G6T5, Package (0x07)

{

0x060400C3,

"Power FAN Speed",

0x20000000,

Zero,

0x0258,

0x1900,

0x02

})

Name (G6T6, Package (0x07)

{

0x06020061,

"+12V Voltage",

0x20000000,

0x2EE0,

0x27D8,

0x0E10,

0x02

})

Name (G6T7, Package (0x07)

{

0x06020062,

"+5V Voltage",

0x20000000,

0x1388,

0x1194,

0x03E8,

0x02

})

Name (G6T8, Package (0x07)

{

0x06020063,

"+3.3V Voltage",

0x20000000,

0x0CE4,

0x0B9A,

0x0294,

0x02

})

Name (G6T9, Package (0x07)

{

0x06030074,

"MB Temperature",

0x20000000,

Zero,

0x01C2,

0x01F4,

0x02

})

Name (GRP6, Package (0x09)

{

G6T1,

G6T2,

G6T3,

G6T4,

G6T5,

G6T6,

G6T7,

G6T8,

G6T9

})

Method (GIT6, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x11)

{

ASB1 = 0x0600

}

ElseIf (_T_0 == 0x12)

{

ASB1 = 0x0601

}

ElseIf (_T_0 == 0x13)

{

ASB1 = 0x0602

}

ElseIf (_T_0 == 0x73)

{

ASB1 = 0x0603

}

ElseIf (_T_0 == 0xC3)

{

ASB1 = 0x0604

}

ElseIf (_T_0 == 0x61)

{

ASB1 = 0x0605

}

ElseIf (_T_0 == 0x62)

{

ASB1 = 0x0606

}

ElseIf (_T_0 == 0x63)

{

ASB1 = 0x0607

}

ElseIf (_T_0 == 0x74)

{

ASB1 = 0x0608

}

Else

{

ASB0 = Zero

}

}

Method (SIT6, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x11)

{

DBG8 = 0x0600

}

ElseIf (_T_0 == 0x12)

{

DBG8 = 0x0601

}

ElseIf (_T_0 == 0x13)

{

DBG8 = 0x0602

}

ElseIf (_T_0 == 0x73)

{

DBG8 = 0x0603

}

ElseIf (_T_0 == 0xC3)

{

DBG8 = 0x0604

}

ElseIf (_T_0 == 0x61)

{

DBG8 = 0x0605

}

ElseIf (_T_0 == 0x62)

{

DBG8 = 0x0606

}

ElseIf (_T_0 == 0x63)

{

DBG8 = 0x0607

}

ElseIf (_T_0 == 0x74)

{

DBG8 = 0x0608

}

Else

{

ASB0 = Zero

}

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (G9T0, Package (0x0C)

{

0x09080000,

"AI Overclocking",

Zero,

One,

0x07,

"Manual",

"Auto",

"Standard",

Zero,

"N.O.S.",

Zero,

"CPU Level Up"

})

Name (GRP9, Package (0x01)

{

G9T0

})

Method (GIT9, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

If (GNVS (0x67AA) == Zero)

{

If (GNVS (0x3523) == 0x06)

{

SNVS (0x3523, One)

}

}

ASB1 = GNVS (0x3523)

}

Else

{

ASB0 = Zero

}

}

Method (SIT9, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

If (GNVS (0x3523) != Arg1)

{

If (Arg2 & One)

{

If (Arg1 == 0x06)

{

If (GNVS (0x352B) == Zero)

{

ASB0 = Zero

Return (Zero)

}

}

If (GNVS (0x3523) == 0x06)

{

SNVS (0x352B, Zero)

}

SNVS (0x3523, Arg1)

}

ASB0 |= 0x02

}

}

Else

{

ASB0 = Zero

}

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (GBT0, Package (0x07)

{

0x0B060001,

"System Performance",

Zero,

Zero,

0x03,

One,

0x04

})

Name (GBT1, Package (0x07)

{

0x0B060002,

"System Performance Control",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GBT2, Package (0x07)

{

0x0B060003,

"System GUI",

0x04,

Zero,

Zero,

Zero,

Zero

})

Name (GBT3, Package (0x07)

{

0x0B050006,

"AI Gear push up",

Zero,

One,

Zero,

One,

0x1F

})

Name (GBT4, Package (0x07)

{

0x0B050007,

"AI Gear pop down",

Zero,

One,

Zero,

One,

0x33

})

Name (GBT5, Package (0x07)

{

0x0B060010,

"Level Switch",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GBT7, Package (0x07)

{

0x0B060021,

"AI Gear NB voltage",

Zero,

Zero,

Zero,

One,

0x02

})

Name (GBT8, Package (0x07)

{

0x0B060022,

"AI Gear load line select",

Zero,

Zero,

Zero,

One,

0x03

})

Name (GBT9, Package (0x07)

{

0x0B060023,

"AI Gear CPU voltage",

Zero,

Zero,

Zero,

One,

0x03

})

Name (GRPB, Package (0x09)

{

GBT0,

GBT1,

GBT2,

GBT3,

GBT4,

GBT5,

GBT7,

GBT8,

GBT9

})

Method (GITB, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == One)

{

ASB1 = (DerefOf (GBT0 [0x02]) & 0xFFFF)

}

ElseIf (_T_0 == 0x02)

{

ASB1 = DerefOf (GBT1 [0x02])

}

ElseIf (_T_0 == 0x03)

{

ASB1 = DerefOf (GBT2 [0x02])

}

ElseIf (_T_0 == 0x06)

{

ASB1 = GDEF (Zero)

}

ElseIf (_T_0 == 0x07)

{

ASB1 = GDEF (0x05)

}

ElseIf (_T_0 == 0x20)

{

ASB1 = GDEF (0x03)

}

ElseIf (_T_0 == 0x21)

{

ASB1 = GDEF (One)

}

ElseIf (_T_0 == 0x22)

{

ASB1 = GDEF (0x04)

}

ElseIf (_T_0 == 0x23)

{

ASB1 = GDEF (0x02)

}

Else

{

ASB0 = Zero

}

}

Method (SITB, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == One)

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

_T_1 = (Arg2 & 0xFFFF)

If (_T_1 == Zero)

{

If (GNVS (0x3523) == Zero)

{

ASB0 = COMS (Arg1, ASB0)

}

Else

{

Local0 = (DerefOf (GBT0 [0x02]) & 0xFFFF)

If (Local0 == Zero)

{

PAR0 = Local0

}

}

}

ElseIf (_T_1 == One)

{

Local0 = (Arg1 & 0xFFFF)

GBT0 [0x02] = Local0

SICL (Local0)

PAR0 = Local0

}

Else

{

ASB0 = Zero

}

}

ElseIf (_T_0 == 0x02)

{

Local0 = (Arg1 & 0xFF)

If (STCG (Local0) == One)

{

GBT1 [0x02] = Local0

}

Else

{

ASB0 = Zero

}

}

ElseIf (_T_0 == 0x06)

{

Local0 = (Arg1 + DerefOf (GBT3 [0x04]))

AGPU (Local0, DerefOf (GBT3 [0x05]))

}

ElseIf (_T_0 == 0x07)

{

Local0 = (Arg1 + DerefOf (GBT4 [0x04]))

AGPD (Local0, DerefOf (GBT4 [0x05]))

}

ElseIf (_T_0 == 0x10)

{

Local0 = (Arg1 & 0xFF)

AGLS (Local0)

}

ElseIf (_T_0 == 0x20)

{

Local0 = (Arg1 & 0xFF)

AGDV (Local0)

}

ElseIf (_T_0 == 0x21)

{

Local0 = (Arg1 & 0xFF)

AGNV (Local0)

}

ElseIf (_T_0 == 0x22)

{

Local0 = (Arg1 & 0xFF)

AGLI (Local0)

}

ElseIf (_T_0 == 0x23)

{

Local0 = (Arg1 & 0xFF)

AGCV (Local0)

}

Else

{

ASB0 = Zero

}

}

}

Scope (_GPE)

{

Method (_L17, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PCI0.SBRG.ASOC, 0x05) // Frequency Mismatch

If (\_SB.PCI0.SBRG.ASOC.AIGC == One)

{

\_SB.PCI0.SBRG.ASOC.GITE (0x0E060001)

\_SB.PCI0.SBRG.ASOC.SICL ((0x8010 | \_SB.PCI0.SBRG.ASOC.ASB1))

}

\_SB.PCI0.SBRG.ASOC.RCAS ()

}

}

OperationRegion (GPS0, SystemIO, GPBS, 0x40)

Field (GPS0, ByteAcc, NoLock, Preserve)

{

Offset (0x0C),

, 21,

PWTH, 1,

Offset (0x38),

Offset (0x3A),

NBPS, 1

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (GET1, Package (0x07)

{

0x0E060001,

"OC Status",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GET2, Package (0x07)

{

0x0E0A0011,

"ICPU Value",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GET3, Package (0x07)

{

0x0E020012,

"VCPU Value",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GET4, Package (0x07)

{

0x0E0B0013,

"PCPU Value",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GET5, Package (0x07)

{

0x0E0A0014,

"OC Threshold1",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GET6, Package (0x07)

{

0x0E0A0015,

"OC Threshold2",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GET7, Package (0x07)

{

0x0E0A0016,

"OC Threshold3",

Zero,

Zero,

Zero,

Zero,

Zero

})

Name (GRPE, Package (0x07)

{

GET1,

GET2,

GET3,

GET4,

GET5,

GET6,

GET7

})

Name (ADP3, Package (0x0B)

{

0x40,

0xF5,

0xF1,

0x8B,

0x96,

0xEE,

0xEF,

0xF0,

0xDD,

0xDF,

0x03

})

Name (OCST, Buffer (0x04)

{

0x00, 0x01, 0x02, 0x03 /* .... */

})

Method (GITE, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == One)

{

ASB1 = DerefOf (OCST [RBYT (DerefOf (ADP3 [Zero]), DerefOf (

ADP3 [One]))])

}

ElseIf (_T_0 == 0x11)

{

ASB1 = RBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x02]

))

}

ElseIf (_T_0 == 0x12)

{

ASB1 = RWRD (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x03]

))

}

ElseIf (_T_0 == 0x13)

{

ASB1 = RWRD (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x04]

))

}

ElseIf (_T_0 == 0x14)

{

ASB1 = RBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x05]

))

}

ElseIf (_T_0 == 0x15)

{

ASB1 = RBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x06]

))

}

ElseIf (_T_0 == 0x16)

{

ASB1 = RBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x07]

))

}

Else

{

ASB0 = Zero

}

}

Method (SITE, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x14)

{

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x05]), Arg1)

}

ElseIf (_T_0 == 0x15)

{

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x06]), Arg1)

}

ElseIf (_T_0 == 0x16)

{

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x07]), Arg1)

}

Else

{

ASB0 = Zero

}

}

Name (OMNB, Buffer (0x02)

{

0x00, 0x00 /* .. */

})

Name (CDTB, Buffer (0x08)

{

0x02, 0xFF, 0x04, 0xFF, 0x02, 0xFF, 0x02, 0xFF /* ........ */

})

Name (FSBL, Package (0x04)

{

Package (0x04)

{

0x5C,

0xC3,

0x64,

0xFC

},

Package (0x04)

{

0xE2,

0x9E,

0x36,

0xFC

},

Package (0x04)

{

0x22,

0xC6,

0x62,

0xC6

},

Package (0x04)

{

0x5C,

0xC3,

0xDE,

0xD1

}

})

Name (OMST, Buffer (0x08)

{

0x01, 0x00, 0x01, 0x01, 0x00, 0x00, 0x02, 0x03 /* ........ */

})

Name (DFSB, Buffer (0x08)

{

0x00, 0x00, 0x0A, 0x0A, 0x03, 0x00, 0x01, 0x01 /* ........ */

})

Name (OLTB, Buffer (0x14)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */

/* 0008 */ 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* ........ */

/* 0010 */ 0x01, 0x01, 0x00, 0x01 /* .... */

})

Name (LDLE, Package (0x04)

{

Package (0x03)

{

0x19,

0x19,

0x19

},

Package (0x03)

{

0x19,

0x19,

0x19

},

Package (0x03)

{

0x0A,

0x0D,

0x11

},

Package (0x03)

{

0x04,

0x07,

0x0B

}

})

Name (CUVR, Package (0x04)

{

Package (0x03)

{

Zero,

Zero,

Zero

},

Package (0x03)

{

Zero,

Zero,

Zero

},

Package (0x03)

{

0x34,

0x30,

0x2C

},

Package (0x03)

{

0x30,

0x2C,

0x28

}

})

Name (CLKB, Buffer (0x1B)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */

/* 0018 */ 0x00, 0x00, 0x00 /* ... */

})

CreateByteField (CLKB, Zero, CB00)

CreateByteField (CLKB, One, CB01)

CreateByteField (CLKB, 0x0B, CB11)

CreateByteField (CLKB, 0x0C, CB12)

CreateByteField (CLKB, 0x14, CB20)

CreateByteField (CLKB, 0x16, CB22)

CreateByteField (CLKB, 0x17, CB23)

CreateByteField (CLKB, 0x18, CB24)

CreateByteField (CLKB, 0x19, CB25)

Name (FSBT, Zero)

Name (AIGC, Zero)

Name (PICL, One)

Name (LVIC, Zero)

Name (CDIV, Zero)

Name (NBVT, Zero)

Method (STCG, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFF)

If (_T_0 == Zero)

{

CLKB = RBLK (0xD2, Zero, 0x1A)

If (GNVS (0x3523) != Zero)

{

CB00 = (CB00 | 0x20)

CB01 = (CB01 | 0x10)

CB20 = (CB20 & 0xFB)

CB22 = (CB22 & 0xF7)

CB11 = DerefOf (DerefOf (FSBL [FSBT]) [0x02])

CB12 = DerefOf (DerefOf (FSBL [FSBT]) [0x03])

}

WBLK (0xD2, Zero, 0x1A, CLKB)

}

ElseIf (_T_0 == One)

{

CLKB = RBLK (0xD2, Zero, 0x1A)

If (((DerefOf (OMNB [Zero]) == Zero) & (DerefOf (

OMNB [One]) == Zero)) | (DerefOf (OMNB [Zero]) !=

CB11))

{

OMNB [Zero] = CB11 /* \_SB_.PCI0.SBRG.ASOC.CB11 */

OMNB [One] = CB12 /* \_SB_.PCI0.SBRG.ASOC.CB12 */

}

CDIV = DerefOf (CDTB [(CB00 & 0x07)])

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

_T_1 = GNVS (0x37C4)

If (_T_1 == Zero)

{

FSBT = One

}

ElseIf (_T_1 == 0x04)

{

FSBT = 0x02

}

ElseIf (_T_1 == 0x06)

{

FSBT = 0x03

}

Else

{

FSBT = Zero

}

If (GNVS (0x3523) == Zero)

{

SVOT (Zero, Zero, CB12)

}

NBVT = RBYT (0x70, 0x03)

}

Else

{

Return (Zero)

}

Return (One)

}

Method (COMS, 2, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == 0x8000)

{

Return (Arg1 &= 0xFB)

}

ElseIf (_T_0 == 0x4000)

{

If (DerefOf (OMST [Zero]) == One)

{

Return (Arg1 &= 0xFB)

}

}

ElseIf (_T_0 == Zero)

{

If (DerefOf (OMST [One]) == One)

{

Return (Arg1 &= 0xFB)

}

}

ElseIf (_T_0 == One)

{

If (DerefOf (OMST [0x02]) == One)

{

Return (Arg1 &= 0xFB)

}

}

ElseIf (_T_0 == 0x02)

{

If (DerefOf (OMST [0x03]) == One)

{

Return (Arg1 &= 0xFB)

}

}

Else

{

Return (Arg1 |= 0x04)

}

Return (Arg1 |= 0x04)

}

Method (GDEF, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFF)

If (_T_0 == Zero)

{

If (GNVS (0x3523) == Zero)

{

Local0 = (0x04 * GNVS (0x3523))

}

Else

{

Local0 = (0x04 * One)

}

Return (DerefOf (DFSB [(LVIC + Local0)]))

}

ElseIf (_T_0 == One)

{

Return (GVOT (One, LVIC))

}

ElseIf (_T_0 == 0x02)

{

Return (GVOT (0x02, LVIC))

}

ElseIf (_T_0 == 0x03)

{

Return (GVOT (0x03, LVIC))

}

ElseIf (_T_0 == 0x04)

{

Return (GVOT (0x04, LVIC))

}

ElseIf (_T_0 == 0x05)

{

If (GNVS (0x3523) == Zero)

{

Local0 = (0x04 * GNVS (0x3523))

}

Else

{

Local0 = (0x04 * One)

}

Return (DerefOf (DFSB [(LVIC + Local0)]))

}

Else

{

Return (Zero)

}

}

Method (CAMN, 1, NotSerialized)

{

If (GNVS (0x3523) == Zero)

{

Local0 = (DerefOf (OMNB [Zero]) & 0x3F)

Local1 = DerefOf (OMNB [One])

Local1 = ((Local2 = (Local1 << 0x03)) | (Local2 = ((Local2 = (DerefOf (

OMNB [Zero]) >> 0x06)) << One)))

}

Else

{

Local0 = (DerefOf (DerefOf (FSBL [FSBT]) [Zero]) & 0x3F)

Local1 = DerefOf (DerefOf (FSBL [FSBT]) [One])

Local1 = ((Local2 = (Local1 << 0x03)) | (Local2 = ((Local2 = (DerefOf (

DerefOf (FSBL [FSBT]) [Zero]) >> 0x06)) << One)))

}

Local2 = GNVS (0xA7A0)

Local4 = (0x0598 * Local1)

Divide (Local4, 0x64, Local5, Local3)

Divide (Local3, Local0, Local5, Local3)

Local4 = CDIV /* \_SB_.PCI0.SBRG.ASOC.CDIV */

Local7 = (Arg0 * Local4)

Local0 = (Local0 *= Local7 * 0x64)

Divide (Local0, 0x0598, Local5, Local0)

Local0 >>= 0x03

If (Local0 > 0xFF)

{

Return (0xFF)

}

Else

{

Return (Local0)

}

}

Method (AGPU, 2, NotSerialized)

{

If (Arg0 > Zero)

{

Local0 = CAMN (CAFS (One, Arg0, Arg1))

SVOT (Zero, LVIC, Local0)

}

Return (One)

}

Method (AGPD, 2, NotSerialized)

{

If (Arg0 > Zero)

{

SVOT (Zero, LVIC, CAMN (CAFS (Zero, Arg0, Arg1)))

}

Return (One)

}

Method (AGLS, 1, NotSerialized)

{

LVIC = Arg0

Return (One)

}

Method (AGDV, 1, NotSerialized)

{

SVOT (0x03, LVIC, Arg0)

Return (One)

}

Method (AGNV, 1, NotSerialized)

{

SVOT (One, LVIC, Arg0)

Return (One)

}

Method (AGLI, 1, NotSerialized)

{

SVOT (0x04, LVIC, Arg0)

Return (One)

}

Method (AGCV, 1, NotSerialized)

{

SVOT (0x02, LVIC, Arg0)

Return (One)

}

Method (SVOT, 3, NotSerialized)

{

Local0 = (Arg0 + (Arg1 * 0x05))

OLTB [Local0] = Arg2

Return (One)

}

Method (GVOT, 2, NotSerialized)

{

Local0 = (Arg0 + (Arg1 * 0x05))

Local1 = DerefOf (OLTB [Local0])

Return (Local1)

}

Method (CAFS, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFF)

If (_T_0 == Zero)

{

Local0 = (Arg1 * Arg2)

Local0 = (0x64 - Local0)

Local0 *= GNVS (0xA7A0)

Divide (Local0, 0x64, Local5, Local0)

}

ElseIf (_T_0 == One)

{

Local0 = (Arg1 * Arg2)

Local0 += 0x64

Local0 *= GNVS (0xA7A0)

Divide (Local0, 0x64, Local5, Local0)

}

Return (Local0)

}

Method (SICL, 1, NotSerialized)

{

If (Arg0 & 0x8000)

{

AIGC = One

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFF)

If (_T_0 == Zero)

{

ITAT ()

}

ElseIf (_T_0 == 0x10)

{

SPIC (Zero)

PICL = Zero

}

ElseIf (_T_0 == 0x11)

{

SPIC (One)

PICL = One

}

ElseIf (_T_0 == 0x12)

{

SPIC (0x02)

PICL = 0x02

}

ElseIf (_T_0 == 0x13)

{

SPIC (0x03)

PICL = 0x03

}

Else

{

Return (Zero)

}

}

Else

{

AIGC = Zero

If (Arg0 & 0x4000)

{

SPIC (Zero)

PICL = Zero

}

Else

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

_T_1 = (Arg0 & 0xFF)

If (_T_1 == Zero)

{

SPIC (One)

PICL = One

}

ElseIf (_T_1 == One)

{

SPIC (0x02)

PICL = 0x02

}

ElseIf (_T_1 == 0x02)

{

SPIC (0x03)

PICL = 0x03

}

Else

{

Return (Zero)

}

}

}

Return (One)

}

Method (SPIC, 1, NotSerialized)

{

If (Arg0 <= PICL)

{

NBPS = GVOT (One, Arg0)

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x08]), DerefOf (

DerefOf (CUVR [Arg0]) [GVOT (0x02, Arg0)]))

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x09]), DerefOf (

DerefOf (LDLE [Arg0]) [GVOT (0x04, Arg0)]))

If (Arg0 == 0x03)

{

PWTH = Zero

}

Else

{

PWTH = One

}

If (AIGC == Zero)

{

SFSB (Arg0)

}

ANBV (GVOT (One, Arg0))

}

Else

{

If (AIGC == Zero)

{

SFSB (Arg0)

}

If (Arg0 == 0x03)

{

PWTH = Zero

}

Else

{

PWTH = One

}

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x09]), DerefOf (

DerefOf (LDLE [Arg0]) [GVOT (0x04, Arg0)]))

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x08]), DerefOf (

DerefOf (CUVR [Arg0]) [GVOT (0x02, Arg0)]))

NBPS = GVOT (One, Arg0)

ANBV (GVOT (One, Arg0))

}

RCAS ()

}

Name (PSLV, Package (0x04)

{

Package (0x03)

{

Zero,

Zero,

Zero

},

Package (0x03)

{

Zero,

Zero,

0xFF

},

Package (0x03)

{

Zero,

0xFF,

0xFF

},

Package (0x03)

{

0xFF,

0xFF,

0xFF

}

})

Method (SFSB, 1, NotSerialized)

{

CLKB = RBLK (0xD2, Zero, 0x1A)

CB00 = (CB00 & 0xDF)

CB01 = (CB01 | 0x10)

CB20 = (CB20 & 0xFB)

CB22 = (CB22 & 0xF7)

Local1 = CB11 /* \_SB_.PCI0.SBRG.ASOC.CB11 */

Local2 = CB12 /* \_SB_.PCI0.SBRG.ASOC.CB12 */

If (GNVS (0x3523) == Zero)

{

If (DerefOf (OMST [(Arg0 + 0x04)]) == Zero)

{

CB11 = DerefOf (OMNB [Zero])

CB12 = DerefOf (OMNB [One])

}

Else

{

CB12 = GVOT (Zero, DerefOf (OMST [(Arg0 + 0x04)]))

}

Local5 = Zero

WBLK (0xD2, Zero, 0x1A, CLKB)

}

ElseIf (Arg0 == One)

{

CB11 = DerefOf (DerefOf (FSBL [FSBT]) [0x02])

CB12 = DerefOf (DerefOf (FSBL [FSBT]) [0x03])

}

Else

{

CB11 = DerefOf (DerefOf (FSBL [FSBT]) [Zero])

CB12 = GVOT (Zero, Arg0)

}

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x05]), DerefOf (

DerefOf (PSLV [Local5]) [Zero]))

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x06]), DerefOf (

DerefOf (PSLV [Local5]) [One]))

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x07]), DerefOf (

DerefOf (PSLV [Local5]) [0x02]))

Sleep (0x03E8)

}

Method (ITAT, 0, NotSerialized)

{

CLKB = RBLK (0xD2, Zero, 0x1A)

If (GNVS (0x3523) == Zero)

{

CB00 = (CB00 & 0xDF)

CB01 = (CB01 & 0xEF)

CB20 = (CB20 | 0x04)

CB22 = (CB22 | 0x08)

CB12 = DerefOf (OMNB [One])

CB24 = DerefOf (OMNB [One])

CB23 = GVOT (Zero, 0x03)

CB25 = GVOT (Zero, 0x03)

Local0 = Zero

}

Else

{

CB00 = (CB00 & 0xDF)

CB01 = (CB01 & 0xEF)

CB20 = (CB20 | 0x04)

CB22 = (CB22 | 0x08)

CB11 = DerefOf (DerefOf (FSBL [FSBT]) [Zero])

CB24 = DerefOf (DerefOf (FSBL [FSBT]) [One])

CB23 = GVOT (Zero, 0x02)

CB25 = GVOT (Zero, 0x03)

CB12 = (GVOT (Zero, Zero) - One)

Local0 = One

}

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x05]), DerefOf (

DerefOf (PSLV [Local0]) [Zero]))

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x06]), DerefOf (

DerefOf (PSLV [Local0]) [One]))

WBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x07]), DerefOf (

DerefOf (PSLV [Local0]) [0x02]))

Sleep (0x03E8)

WBLK (0xD2, Zero, 0x1A, CLKB)

}

Method (RCAS, 0, NotSerialized)

{

SBYT (DerefOf (ADP3 [Zero]), DerefOf (ADP3 [0x0A]))

}

Method (ANBV, 1, NotSerialized)

{

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (GFI1, Package (0x0C)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x07,

"Original",

"E6400",

"E6550",

"E6600",

"E6700",

"X6800",

"E6850"

})

Name (GFI2, Package (0x0B)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x06,

"Original",

"E6550",

"E6600",

"E6700",

"X6800",

"E6850"

})

Name (GFI3, Package (0x0A)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x05,

"Original",

"E6600",

"E6700",

"X6800",

"E6850"

})

Name (GFI4, Package (0x0A)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x05,

"Original",

"E6700",

"X6800",

"E6850",

"Crazy"

})

Name (GFI5, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"X6800",

"E6850",

"Crazy"

})

Name (GFI6, Package (0x08)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x03,

"Original",

"E6850",

"Crazy"

})

Name (GFI7, Package (0x07)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x02,

"Original",

"Crazy"

})

Name (GFI8, Package (0x0A)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x05,

"Original",

"QX6700",

"QX6800",

"QX6850",

"Crazy"

})

Name (GFI9, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"QX6800",

"QX6850",

"Crazy"

})

Name (GFIA, Package (0x08)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x03,

"Original",

"QX6850",

"Crazy"

})

Name (GFIB, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"E8400",

"E8500",

"Crazy"

})

Name (GFIC, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"E8400",

"E8500",

"E8600"

})

Name (GFID, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"E8500",

"E8600",

"Crazy"

})

Name (GFIE, Package (0x08)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x03,

"Original",

"E8600",

"Crazy"

})

Name (GFIF, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"Q8300",

"Q9450",

"Q9550"

})

Name (GFIG, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"Q9450",

"Q9550",

"Q9650"

})

Name (GFIH, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"Q9400",

"Q9550",

"Q9650"

})

Name (GFII, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"Q9550",

"Q9650",

"QX9770"

})

Name (GFIJ, Package (0x0A)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x05,

"Original",

"Q9550",

"QX9650",

"QX9770",

"Crazy"

})

Name (GFIK, Package (0x09)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x04,

"Original",

"QX9650",

"QX9770",

"Crazy"

})

Name (GFIL, Package (0x08)

{

0x0F080000,

"CPU Level Up",

Zero,

Zero,

0x03,

"Original",

"Q9770",

"Crazy"

})

Method (GRPF, 0, NotSerialized)

{

Local0 = GNVS (0x67AA)

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = Local0

If (_T_0 == One)

{

Return (Package (0x01)

{

GFI1

})

}

ElseIf (_T_0 == 0x02)

{

Return (Package (0x01)

{

GFI1

})

}

ElseIf (_T_0 == 0x03)

{

Return (Package (0x01)

{

GFI2

})

}

ElseIf (_T_0 == 0x04)

{

Return (Package (0x01)

{

GFI2

})

}

ElseIf (_T_0 == 0x05)

{

Return (Package (0x01)

{

GFI3

})

}

ElseIf (_T_0 == 0x06)

{

Return (Package (0x01)

{

GFI3

})

}

ElseIf (_T_0 == 0x07)

{

Return (Package (0x01)

{

GFI4

})

}

ElseIf (_T_0 == 0x08)

{

Return (Package (0x01)

{

GFI5

})

}

ElseIf (_T_0 == 0x09)

{

Return (Package (0x01)

{

GFI5

})

}

ElseIf (_T_0 == 0x0A)

{

Return (Package (0x01)

{

GFI6

})

}

ElseIf (_T_0 == 0x0B)

{

Return (Package (0x01)

{

GFI7

})

}

ElseIf (_T_0 == 0x0C)

{

Return (Package (0x01)

{

GFI8

})

}

ElseIf (_T_0 == 0x0D)

{

Return (Package (0x01)

{

GFI9

})

}

ElseIf (_T_0 == 0x0E)

{

Return (Package (0x01)

{

GFI9

})

}

ElseIf (_T_0 == 0x0F)

{

Return (Package (0x01)

{

GFIA

})

}

ElseIf (_T_0 == 0x10)

{

Return (Package (0x01)

{

GFI7

})

}

ElseIf (_T_0 == 0x11)

{

Return (Package (0x01)

{

GFI8

})

}

ElseIf (_T_0 == 0x12)

{

Return (Package (0x01)

{

GFIB

})

}

ElseIf (_T_0 == 0x13)

{

Return (Package (0x01)

{

GFID

})

}

ElseIf (_T_0 == 0x14)

{

Return (Package (0x01)

{

GFIE

})

}

ElseIf (_T_0 == 0x15)

{

Return (Package (0x01)

{

GFIJ

})

}

ElseIf (_T_0 == 0x16)

{

Return (Package (0x01)

{

GFIK

})

}

ElseIf (_T_0 == 0x17)

{

Return (Package (0x01)

{

GFIL

})

}

ElseIf (_T_0 == 0x18)

{

Return (Package (0x01)

{

GFI7

})

}

ElseIf (_T_0 == 0x19)

{

Return (Package (0x01)

{

GFIC

})

}

ElseIf (_T_0 == 0x1A)

{

Return (Package (0x01)

{

GFIF

})

}

ElseIf (_T_0 == 0x1B)

{

Return (Package (0x01)

{

GFI7

})

}

ElseIf (_T_0 == 0x1C)

{

Return (Package (0x01)

{

GFIG

})

}

ElseIf (_T_0 == 0x1D)

{

Return (Package (0x01)

{

GFIH

})

}

ElseIf (_T_0 == 0x1E)

{

Return (Package (0x01)

{

GFII

})

}

Return (Package (0x00) {})

}

Method (GITF, 1, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

ASB1 = GNVS (0x352B)

}

Else

{

ASB0 = Zero

}

}

Method (SITF, 3, NotSerialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

_T_0 = (Arg0 & 0xFFFF)

If (_T_0 == Zero)

{

ASB0 = Zero

If (Arg2 == Zero)

{

ASB0 |= 0x03

}

If (Arg2 & One)

{

PAR0 = Arg1

ISMI (0xAC)

Local0 = (PAR0 & 0xFFFF)

If (Local0 == One)

{

ASB0 |= 0x03

}

}

}

}

}

OperationRegion (_SB.PCI0.SBRG.PIX0, PCI_Config, 0x60, 0x0C)

Field (\_SB.PCI0.SBRG.PIX0, ByteAcc, NoLock, Preserve)

{

PIRA, 8,

PIRB, 8,

PIRC, 8,

PIRD, 8,

Offset (0x08),

PIRE, 8,

PIRF, 8,

PIRG, 8,

PIRH, 8

}

Scope (_SB)

{

Name (BUFA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{15}

})

CreateWordField (BUFA, One, IRA0)

Device (LNKA)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRA & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSA) /* \_SB_.PRSA */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRA |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRA & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRA = Local0

}

}

Device (LNKB)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRB & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSB) /* \_SB_.PRSB */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRB |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRB & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRB = Local0

}

}

Device (LNKC)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x03) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRC & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSC) /* \_SB_.PRSC */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRC |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRC & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRC = Local0

}

}

Device (LNKD)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x04) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRD & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSD) /* \_SB_.PRSD */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRD |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRD & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRD = Local0

}

}

Device (LNKE)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x05) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRE & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSE) /* \_SB_.PRSE */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRE |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRE & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRE = Local0

}

}

Device (LNKF)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x06) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRF & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSF) /* \_SB_.PRSF */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRF |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRF & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRF = Local0

}

}

Device (LNKG)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x07) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRG & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSG) /* \_SB_.PRSG */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRG |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRG & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRG = Local0

}

}

Device (LNKH)

{

Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID

Name (_UID, 0x08) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Local0 = (PIRH & 0x80)

If (Local0)

{

Return (0x09)

}

Else

{

Return (0x0B)

}

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

Return (PRSH) /* \_SB_.PRSH */

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

PIRH |= 0x80

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = (PIRH & 0x0F)

IRA0 = (One << Local0)

Return (BUFA) /* \_SB_.BUFA */

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRA)

FindSetRightBit (IRA, Local0)

Local0--

PIRH = Local0

}

}

}

Scope (_SB)

{

Name (XCPD, Zero)

Name (XNPT, One)

Name (XCAP, 0x02)

Name (XDCP, 0x04)

Name (XDCT, 0x08)

Name (XDST, 0x0A)

Name (XLCP, 0x0C)

Name (XLCT, 0x10)

Name (XLST, 0x12)

Name (XSCP, 0x14)

Name (XSCT, 0x18)

Name (XSST, 0x1A)

Name (XRCT, 0x1C)

Mutex (MUTE, 0x00)

Method (RBPE, 1, NotSerialized)

{

Acquire (MUTE, 0x03E8)

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, One)

Field (PCFG, ByteAcc, NoLock, Preserve)

{

XCFG, 8

}

Release (MUTE)

Return (XCFG) /* \_SB_.RBPE.XCFG */

}

Method (RWPE, 1, NotSerialized)

{

Acquire (MUTE, 0x03E8)

Arg0 &= 0xFFFFFFFE

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, 0x02)

Field (PCFG, WordAcc, NoLock, Preserve)

{

XCFG, 16

}

Release (MUTE)

Return (XCFG) /* \_SB_.RWPE.XCFG */

}

Method (RDPE, 1, NotSerialized)

{

Acquire (MUTE, 0x03E8)

Arg0 &= 0xFFFFFFFC

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, 0x04)

Field (PCFG, DWordAcc, NoLock, Preserve)

{

XCFG, 32

}

Release (MUTE)

Return (XCFG) /* \_SB_.RDPE.XCFG */

}

Method (WBPE, 2, NotSerialized)

{

Acquire (MUTE, 0x0FFF)

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, One)

Field (PCFG, ByteAcc, NoLock, Preserve)

{

XCFG, 8

}

XCFG = Arg1

Release (MUTE)

}

Method (WWPE, 2, NotSerialized)

{

Acquire (MUTE, 0x03E8)

Arg0 &= 0xFFFFFFFE

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, 0x02)

Field (PCFG, WordAcc, NoLock, Preserve)

{

XCFG, 16

}

XCFG = Arg1

Release (MUTE)

}

Method (WDPE, 2, NotSerialized)

{

Acquire (MUTE, 0x03E8)

Arg0 &= 0xFFFFFFFC

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, 0x04)

Field (PCFG, DWordAcc, NoLock, Preserve)

{

XCFG, 32

}

XCFG = Arg1

Release (MUTE)

}

Method (RWDP, 3, NotSerialized)

{

Acquire (MUTE, 0x03E8)

Arg0 &= 0xFFFFFFFC

Local0 = (Arg0 + PCIB) /* \PCIB */

OperationRegion (PCFG, SystemMemory, Local0, 0x04)

Field (PCFG, DWordAcc, NoLock, Preserve)

{

XCFG, 32

}

Local1 = (XCFG & Arg2)

XCFG = (Local1 | Arg1)

Release (MUTE)

}

Method (RPME, 1, NotSerialized)

{

Local0 = (Arg0 + 0x84)

Local1 = RDPE (Local0)

If (Local1 == Ones)

{

Return (Zero)

}

Else

{

If (Local1 && 0x00010000)

{

WDPE (Local0, (Local1 & 0x00010000))

Return (One)

}

Return (Zero)

}

}

}

OperationRegion (SMRG, SystemIO, 0x0400, 0x10)

Field (SMRG, ByteAcc, NoLock, Preserve)

{

HSTS, 8,

SSTS, 8,

HSTC, 8,

HCMD, 8,

HADR, 8,

HDT0, 8,

HDT1, 8,

BLKD, 8

}

Field (SMRG, ByteAcc, NoLock, Preserve)

{

Offset (0x05),

HDTW, 16

}

Method (SCMD, 4, Serialized)

{

Local0 = 0x05

While (Local0--)

{

Local1 = 0xFFFF

While (HSTS && Local1--)

{

HSTS = 0xFE

Stall (0x0A)

}

Local2 = HSTC /* \HSTC */

HADR = Arg0

HCMD = Arg1

HDTW = Arg2

HSTC = Arg3

Local1 = 0xFFFF

While (Local1--)

{

If (HSTS & 0x0C)

{

Local1 = One

}

If ((HSTS & 0x03) == 0x02)

{

Return (HDTW) /* \HDTW */

}

Stall (0x0A)

}

HSTC = 0x42

Local1 = 0xFFFF

While (Local1--)

{

If (HSTS & 0x10)

{

Local1 = One

}

Stall (0x0A)

}

HSTC = Zero

}

Return (Ones)

}

Method (SBYT, 2, NotSerialized)

{

SCMD (Arg0, Arg1, Zero, 0x44)

}

Method (WBYT, 3, NotSerialized)

{

SCMD (Arg0, Arg1, Arg2, 0x48)

}

Method (WWRD, 3, NotSerialized)

{

SCMD (Arg0, Arg1, Arg2, 0x4C)

}

Method (RSBT, 2, NotSerialized)

{

Arg0 |= One

Return ((SCMD (Arg0, Arg1, Zero, 0x44) & 0xFF))

}

Method (RBYT, 2, NotSerialized)

{

Arg0 |= One

Return ((SCMD (Arg0, Arg1, Zero, 0x48) & 0xFF))

}

Method (RWRD, 2, NotSerialized)

{

Arg0 |= One

Return (SCMD (Arg0, Arg1, Zero, 0x4C))

}

Method (RBLK, 3, NotSerialized)

{

Local0 = (Arg0 | One)

SCMD (Local0, Arg1, Arg2, 0x54)

Local0 = HSTC /* \HSTC */

Local0 = HDT0 /* \HDT0 */

Local7 = (Local0 + One)

Name (RBUF, Buffer (Local7) {})

Local1 = Zero

While (Local0)

{

RBUF [Local1] = BLKD /* \BLKD */

Local0--

Local1++

}

Return (RBUF) /* \RBLK.RBUF */

}

Method (WBLK, 4, NotSerialized)

{

Local0 = HSTC /* \HSTC */

Local0 = Zero

While (Local0 <= Arg2)

{

BLKD = DerefOf (Arg3 [Local0])

Local0++

}

Local0 = (Arg0 & 0xFE)

SCMD (Local0, Arg1, Arg2, 0x54)

}

Scope (_SB.PCI0.SBRG.SIOR)

{

Name (SNCT, Zero)

Method (HWV0, 0, NotSerialized)

{

Return ((VCOR * 0x08))

}

Method (HWV1, 0, NotSerialized)

{

Return ((V12V * 0x08))

}

Method (HWV3, 0, NotSerialized)

{

Return ((V33V * 0x08))

}

Method (HWV4, 0, NotSerialized)

{

Return ((V50V * 0x08))

}

Method (CPUV, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x90)

Local1 = RBYT (0x70, 0x91)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (DDRV, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x92)

Local1 = RBYT (0x70, 0x93)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (SB11, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x94)

Local1 = RBYT (0x70, 0x95)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (SB15, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x96)

Local1 = RBYT (0x70, 0x97)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (CPLL, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x98)

Local1 = RBYT (0x70, 0x99)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (FB01, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x9A)

Local1 = RBYT (0x70, 0x9B)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (FB02, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x9C)

Local1 = RBYT (0x70, 0x9D)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (VTTC, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0x9E)

Local1 = RBYT (0x70, 0x9F)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (MBT2, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC0)

Local0 *= 0x0A

Return (Local0)

}

Method (SBT2, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC1)

Local0 *= 0x0A

Return (Local0)

}

Method (NBT2, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC2)

Local0 *= 0x0A

Return (Local0)

}

Method (PWT2, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC3)

Local0 *= 0x0A

Return (Local0)

}

Method (OPT3, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC4)

If (Local0 > 0x6E)

{

Return (Zero)

}

Local0 *= 0x0A

Return (Local0)

}

Method (OPT2, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC5)

If (Local0 > 0x6E)

{

Return (Zero)

}

Local0 *= 0x0A

Return (Local0)

}

Method (OPT1, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0xC6)

If (Local0 > 0x6E)

{

Return (Zero)

}

Local0 *= 0x0A

Return (Local0)

}

Method (HWF5, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0xA2)

Local1 = RBYT (0x70, 0xA3)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWF6, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0xA0)

Local1 = RBYT (0x70, 0xA1)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWF7, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0x94)

Local1 = RBYT (0x80, 0x95)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWF8, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0x92)

Local1 = RBYT (0x80, 0x93)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWF9, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0x90)

Local1 = RBYT (0x80, 0x91)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWFA, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0xA6)

Local1 = RBYT (0x70, 0xA7)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWFB, 0, NotSerialized)

{

Local0 = RBYT (0x70, 0xA4)

Local1 = RBYT (0x70, 0xA5)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWFC, 0, NotSerialized)

{

Local0 = RBYT (0x80, 0x96)

Local1 = RBYT (0x80, 0x97)

Local1 *= 0x0100

Local0 += Local1

Return (Local0)

}

Method (HWT0, 0, NotSerialized)

{

Local1 = MBTE /* \_SB_.PCI0.SBRG.SIOR.MBTE */

If (Local1 & 0x80)

{

Local1 |= 0xFFFFFF00

}

Local1 *= 0x0A

Return (Local1)

}

Method (HWT1, 0, NotSerialized)

{

If (SNCT < 0x02)

{

BSEL = One

Local3 = TSR1 /* \_SB_.PCI0.SBRG.SIOR.TSR1 */

BSEL = Zero

Local1 = (MBTE + One)

Local1 ^= 0x80

Local3 ^= 0x80

If (Local1 > Local3)

{

ENFG (0x0C)

If (CRE0 && 0xF0)

{

Local3 = (Local1 - Local3)

Local3 >>= One

Local3 += 0x03

CRE1 += Local3

Sleep (0x32)

}

SNCT++

EXFG ()

}

}

BSEL = One

Local1 = TSR1 /* \_SB_.PCI0.SBRG.SIOR.TSR1 */

If (Local1 & 0x80)

{

Local1 |= 0xFFFFFF00

}

Local1 *= 0x0A

Local2 = TSR2 /* \_SB_.PCI0.SBRG.SIOR.TSR2 */

Local2 *= 0x05

Local1 += Local2

Return (Local1)

}

Method (HWT2, 0, NotSerialized)

{

BSEL = 0x02

Local1 = TSR1 /* \_SB_.PCI0.SBRG.SIOR.TSR1 */

If (Local1 & 0x80)

{

Local1 |= 0xFFFFFF00

}

Local1 *= 0x0A

Local2 = TSR2 /* \_SB_.PCI0.SBRG.SIOR.TSR2 */

Local2 *= 0x05

Local1 += Local2

Return (Local1)

}

OperationRegion (DBGE, SystemIO, 0x80, 0x04)

Field (DBGE, WordAcc, NoLock, Preserve)

{

DBGG, 22

}

Method (HWF0, 0, NotSerialized)

{

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

BSEL = Zero

Local1 = (FD21 & 0x20)

Local1 >>= 0x05

Local1 *= 0x04

Local2 = (FDR1 & 0x30)

Local2 >>= 0x04

Local1 += Local2

If ((Local1 > 0x05) || (Local1 < 0x02))

{

If (Local0 > 0xF0)

{

Local1 = 0x02

}

ElseIf (Local0 < 0x1E)

{

Local1 = 0x05

}

Else

{

Local1 = 0x03

}

Divide (Local1, 0x04, Local2, Local3)

Local3 <<= 0x05

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0xDF

FD21 = (Local3 | Local4)

Local4 = FDR1 /* \_SB_.PCI0.SBRG.SIOR.FDR1 */

Local4 &= 0xCF

Local2 <<= 0x04

Local4 |= One

FDR1 = (Local4 | Local2)

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

}

While (((Local0 > 0xF0) && (Local1 < 0x05)) || ((Local0 <

0x1E) && (Local1 > 0x02)))

{

If ((Local0 > 0xF0) && (Local1 < 0x05))

{

Local1 += One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x05

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0xDF

FD21 = (Local3 | Local4)

Local4 = FDR1 /* \_SB_.PCI0.SBRG.SIOR.FDR1 */

Local4 &= 0xCF

Local2 <<= 0x04

Local4 |= One

FDR1 = (Local4 | Local2)

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

}

Else

{

Local1 -= One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x05

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0xDF

FD21 = (Local3 | Local4)

Local4 = FDR1 /* \_SB_.PCI0.SBRG.SIOR.FDR1 */

Local4 &= 0xCF

Local2 <<= 0x04

Local4 |= One

FDR1 = (Local4 | Local2)

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

Sleep (0x32)

Local0 = FAN1 /* \_SB_.PCI0.SBRG.SIOR.FAN1 */

}

}

If ((Local0 == 0xFF) && (Local1 == 0x05))

{

Return (Zero)

}

If ((Local0 == Zero) && (Local1 == 0x02))

{

Return (0xFFFF)

}

Local2 = One

While (Local1)

{

Local2 *= 0x02

Local1--

}

Local0 *= Local2

Divide (0x00149970, Local0, Local1, Local0)

Return (Local0)

}

Method (HWF1, 0, NotSerialized)

{

BSEL = Zero

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

Local1 = (FD21 & 0x40)

Local1 >>= 0x06

Local1 *= 0x04

Local2 = (FDR1 & 0xC0)

Local2 >>= 0x06

Local1 += Local2

If ((Local1 > 0x05) || (Local1 < 0x02))

{

If (Local0 > 0xF0)

{

Local1 = 0x02

}

ElseIf (Local0 < 0x1E)

{

Local1 = 0x05

}

Else

{

Local1 = 0x03

}

Divide (Local1, 0x04, Local2, Local3)

Local3 <<= 0x06

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0xBF

FD21 = (Local3 | Local4)

Local4 = FDR1 /* \_SB_.PCI0.SBRG.SIOR.FDR1 */

Local4 &= 0x3F

Local2 <<= 0x06

Local4 |= One

FDR1 = (Local4 | Local2)

Sleep (0x32)

BSEL = Zero

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

}

While (((Local0 > 0xF0) && (Local1 < 0x05)) || ((Local0 <

0x1E) && (Local1 > 0x02)))

{

If ((Local0 < 0x1E) && (Local1 > 0x02))

{

Local1 -= One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x06

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0xBF

FD21 = (Local3 | Local4)

Local4 = FDR1 /* \_SB_.PCI0.SBRG.SIOR.FDR1 */

Local4 &= 0x3F

Local2 <<= 0x06

Local4 |= One

FDR1 = (Local4 | Local2)

Sleep (0x32)

BSEL = Zero

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

Sleep (0x32)

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

Sleep (0x32)

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

}

Else

{

Local1 += One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x06

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0xBF

FD21 = (Local3 | Local4)

Local4 = FDR1 /* \_SB_.PCI0.SBRG.SIOR.FDR1 */

Local4 &= 0x3F

Local2 <<= 0x06

Local4 |= One

FDR1 = (Local4 | Local2)

Sleep (0x32)

BSEL = Zero

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

Sleep (0x32)

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

Sleep (0x32)

Local0 = FAN2 /* \_SB_.PCI0.SBRG.SIOR.FAN2 */

}

}

If ((Local0 == 0xFF) && (Local1 == 0x05))

{

Return (Zero)

}

If ((Local0 == Zero) && (Local1 == 0x02))

{

Return (0xFFFF)

}

Local2 = One

While (Local1)

{

Local2 *= 0x02

Local1--

}

Local0 *= Local2

Divide (0x00149970, Local0, Local1, Local0)

Return (Local0)

}

Method (HWF2, 0, NotSerialized)

{

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

BSEL = Zero

Local1 = (FD21 & 0x80)

Local1 >>= 0x07

Local1 *= 0x04

Divide (FD13, 0x40, Local2, Local3)

Local1 += Local3

If ((Local1 > 0x05) || (Local1 < 0x02))

{

If (Local0 > 0xF0)

{

Local1 = 0x02

}

ElseIf (Local0 < 0x1E)

{

Local1 = 0x05

}

Else

{

Local1 = 0x03

}

Divide (Local1, 0x04, Local2, Local3)

Local3 <<= 0x07

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0x7F

FD21 = (Local3 | Local4)

Local3 = FD13 /* \_SB_.PCI0.SBRG.SIOR.FD13 */

Local3 &= 0x3F

Local2 *= 0x40

Local2 += Local3

FD13 = Local2

Sleep (0x32)

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

}

While (((Local0 > 0xF0) && (Local1 < 0x05)) || ((Local0 <

0x1E) && (Local1 > 0x02)))

{

If ((Local0 > 0xF0) && (Local1 < 0x05))

{

If (Local0 == 0xFF)

{

Local1 = 0x05

}

Else

{

Local1 += One

}

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x07

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0x7F

FD21 = (Local3 | Local4)

Local3 = FD13 /* \_SB_.PCI0.SBRG.SIOR.FD13 */

Local3 &= 0x3F

Local2 *= 0x40

Local2 += Local3

FD13 = Local2

If (Local0 != 0xFF)

{

Sleep (0x32)

}

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

Sleep (0x32)

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

Sleep (0x32)

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

}

Else

{

Local1 -= One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x07

Local4 = FD21 /* \_SB_.PCI0.SBRG.SIOR.FD21 */

Local4 &= 0x7F

FD21 = (Local3 | Local4)

Local3 = FD13 /* \_SB_.PCI0.SBRG.SIOR.FD13 */

Local3 &= 0x3F

Local2 *= 0x40

Local2 += Local3

FD13 = Local2

Sleep (0x32)

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

Sleep (0x32)

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

Sleep (0x32)

Local0 = FAN3 /* \_SB_.PCI0.SBRG.SIOR.FAN3 */

}

}

If ((Local0 == 0xFF) && (Local1 == 0x05))

{

Return (Zero)

}

If ((Local0 == Zero) && (Local1 == 0x02))

{

Return (0xFFFF)

}

Local2 = One

While (Local1)

{

Local2 *= 0x02

Local1--

}

Local0 *= Local2

Divide (0x00149970, Local0, Local1, Local0)

Return (Local0)

}

Method (HWF4, 0, NotSerialized)

{

BSEL = 0x05

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

BSEL = Zero

Local1 = (FND4 & 0x80)

Local1 >>= 0x08

Local1 *= 0x04

Local2 = (FND4 & 0x0C)

Local2 >>= 0x02

Local1 += Local2

If ((Local1 > 0x05) || (Local1 < 0x02))

{

If (Local0 > 0xF0)

{

Local1 = 0x02

}

ElseIf (Local0 < 0x1E)

{

Local1 = 0x05

}

Else

{

Local1 = 0x03

}

Divide (Local1, 0x04, Local2, Local3)

Local3 <<= 0x08

Local2 <<= 0x02

Local4 = FND4 /* \_SB_.PCI0.SBRG.SIOR.FND4 */

Local4 &= 0x73

Local3 |= Local2

FND4 = (Local3 | Local4)

Sleep (0x32)

BSEL = 0x05

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

}

While (((Local0 > 0xF0) && (Local1 < 0x05)) || ((Local0 <

0x1E) && (Local1 > 0x02)))

{

If ((Local0 > 0xF0) && (Local1 < 0x05))

{

Local1 += One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x08

Local2 <<= 0x02

Local4 = FND4 /* \_SB_.PCI0.SBRG.SIOR.FND4 */

Local4 &= 0x73

Local3 |= Local2

FND4 = (Local3 | Local4)

If (Local0 != 0xFF)

{

Sleep (0x32)

}

BSEL = 0x05

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

Sleep (0x32)

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

Sleep (0x32)

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

BSEL = Zero

}

Else

{

Local1 -= One

Divide (Local1, 0x04, Local2, Local3)

BSEL = Zero

Local3 <<= 0x08

Local2 <<= 0x02

Local4 = FND4 /* \_SB_.PCI0.SBRG.SIOR.FND4 */

Local4 &= 0x73

Local3 |= Local2

FND4 = (Local3 | Local4)

Sleep (0x32)

BSEL = 0x05

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

Sleep (0x32)

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

Sleep (0x32)

Local0 = FAN4 /* \_SB_.PCI0.SBRG.SIOR.FAN4 */

BSEL = Zero

}

}

If ((Local0 == 0xFF) && (Local1 == 0x05))

{

Return (Zero)

}

If ((Local0 == Zero) && (Local1 == 0x02))

{

Return (0xFFFF)

}

Local2 = One

While (Local1)

{

Local2 *= 0x02

Local1--

}

Local0 *= Local2

Divide (0x00149970, Local0, Local1, Local0)

Return (Local0)

}

Name (FNDT, Package (0x08)

{

One,

0x02,

0x04,

0x08,

0x10,

0x20,

0x40,

0x80

})

Method (HWF3, 0, NotSerialized)

{

BSEL = Zero

Local0 = CFN3 /* \_SB_.PCI0.SBRG.SIOR.CFN3 */

Local1 = (FD15 & 0x80)

Local1 >>= 0x05

Local2 = (FND4 & 0x03)

Local1 |= Local2

If ((Local1 > 0x05) || (Local1 < 0x02))

{

If (Local0 > 0xF0)

{

Local1 = 0x02

}

ElseIf (Local0 < 0x1E)

{

Local1 = 0x05

}

Else

{

Local1 = 0x03

}

Local2 = (Local1 << 0x05)

Local2 &= 0x80

Local3 = (FD15 & 0x7F)

Local3 |= Local2

FD15 = Local3

Local2 = (Local1 & 0x03)

Local3 = (FND4 & 0xFC)

Local3 |= Local2

FND4 = Local3

Sleep (0x32)

Local0 = CFN3 /* \_SB_.PCI0.SBRG.SIOR.CFN3 */

}

While (((Local0 > 0xF0) && (Local1 < 0x05)) || ((Local0 <

0x1E) && (Local1 > 0x02)))

{

If ((Local0 > 0xF0) && (Local1 < 0x05))

{

Local1++

}

Else

{

Local1--

}

Local2 = (Local1 << 0x05)

Local2 &= 0x80

Local3 = (FD15 & 0x7F)

Local3 |= Local2

FD15 = Local3

Local2 = (Local1 & 0x03)

Local3 = (FND4 & 0xFC)

Local3 |= Local2

FND4 = Local3

Sleep (0x32)

Local0 = CFN3 /* \_SB_.PCI0.SBRG.SIOR.CFN3 */

Sleep (0x32)

Local0 = CFN3 /* \_SB_.PCI0.SBRG.SIOR.CFN3 */

Sleep (0x32)

Local0 = CFN3 /* \_SB_.PCI0.SBRG.SIOR.CFN3 */

}

If ((Local0 == 0xFF) && (Local1 == 0x05))

{

Return (Zero)

}

If ((Local0 == Zero) && (Local1 == 0x02))

{

Return (0xFFFF)

}

Local2 = DerefOf (FNDT [Local1])

Local0 *= Local2

Divide (0x00149970, Local0, Local1, Local0)

Return (Local0)

}

OperationRegion (HWRE, SystemIO, IOHW, 0x0A)

Field (HWRE, ByteAcc, NoLock, Preserve)

{

Offset (0x05),

HIDX, 8,

HDAT, 8

}

IndexField (HIDX, HDAT, ByteAcc, NoLock, Preserve)

{

Offset (0x04),

CHNM, 1,

CFNM, 1,

CHNS, 2,

CFNS, 2,

Offset (0x05),

SYST, 8,

TRGT, 8,

Offset (0x08),

SSDN, 8,

CSDN, 8,

SSUP, 8,

CSUP, 8,

Offset (0x20),

VCOR, 8,

V12V, 8,

Offset (0x23),

V33V, 8,

V50V, 8,

Offset (0x27),

MBTE, 8,

FAN1, 8,

FAN2, 8,

FAN3, 8,

Offset (0x3F),

CFN3, 8,

Offset (0x47),

FDR1, 8,

Offset (0x4B),

FD13, 8,

FD15, 8,

Offset (0x4E),

BSEL, 4,

Offset (0x4F),

Offset (0x50),

TSR1, 8,

, 7,

TSR2, 1,

Offset (0x53),

FAN4, 8,

Offset (0x59),

FND4, 8,

Offset (0x5D),

FD21, 8

}

}

Scope (_SB.PCI0.SBRG.ASOC)

{

Name (CPUV, Package (0x05)

{

0x06020000,

" Vcore Voltage",

0x0320,

0x0708,

One

})

Name (V3VV, Package (0x05)

{

0x06020001,

" +3.3 Voltage",

0x0B9A,

0x0E2E,

One

})

Name (V5VV, Package (0x05)

{

0x06020002,

" +5 Voltage",

0x1194,

0x157C,

One

})

Name (VV12, Package (0x05)

{

0x06020003,

" +12 Voltage",

0x27D8,

0x35E8,

One

})

Name (DDRV, Package (0x05)

{

0x06020004,

" DDR Voltage",

0x0708,

0x0834,

One

})

Name (SB11, Package (0x05)

{

0x06020005,

" SB11 Voltage",

0x0320,

0x0514,

One

})

Name (SB15, Package (0x05)

{

0x06020006,

" SB15 Voltage",

0x0320,

0x0708,

One

})

Name (CPLL, Package (0x05)

{

0x06020007,

" CPUPLL Voltage",

0x04B0,

0x06A4,

One

})

Name (NB11, Package (0x05)

{

0x06020008,

" NB11 Voltage",

0x0320,

0x0708,

One

})

Name (DVTT, Package (0x05)

{

0x06020009,

" Dram VTT Volt",

0x0320,

0x07D0,

One

})

Name (VTTC, Package (0x05)

{

0x0602000A,

" VTTCPU Voltage",

0x0320,

0x05DC,

One

})

Name (VPAR, Package (0x0B)

{

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

0x22,

0x22,

Zero

},

Package (0x03)

{

0x14,

0x0A,

Zero

},

Package (0x03)

{

0x3C,

0x0A,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

},

Package (0x03)

{

Zero,

One,

Zero

}

})

Name (VBUF, Package (0x0C)

{

0x0B,

CPUV,

V3VV,

V5VV,

VV12,

DDRV,

SB11,

SB15,

CPLL,

NB11,

DVTT,

VTTC

})

Method (VGET, 1, NotSerialized)

{

If (Arg0 == Zero)

{

Return (^^SIOR.CPUV ())

}

If (Arg0 == One)

{

Return (^^SIOR.HWV3 ())

}

If (Arg0 == 0x02)

{

Return (^^SIOR.HWV4 ())

}

If (Arg0 == 0x03)

{

Return (^^SIOR.HWV1 ())

}

If (Arg0 == 0x04)

{

Return (^^SIOR.DDRV ())

}

If (Arg0 == 0x05)

{

Return (^^SIOR.SB11 ())

}

If (Arg0 == 0x06)

{

Return (^^SIOR.SB15 ())

}

If (Arg0 == 0x07)

{

Return (^^SIOR.CPLL ())

}

If (Arg0 == 0x08)

{

Return (^^SIOR.FB01 ())

}

If (Arg0 == 0x09)

{

Return (^^SIOR.FB02 ())

}

If (Arg0 == 0x0A)

{

Return (^^SIOR.VTTC ())

}

}

Name (CPUT, Package (0x05)

{

0x06030000,

"CPU Temperature",

0x0258,

0x03B6,

0x00010001

})

Name (MBT2, Package (0x05)

{

0x06030001,

"MB Temperature",

0x01F4,

0x03B6,

0x00010001

})

Name (SBT2, Package (0x05)

{

0x06030002,

"SB Temperature",

0x028A,

0x03B6,

0x00010001

})

Name (NBT2, Package (0x05)

{

0x06030003,

"NB Temperature",

0x028A,

0x03B6,

0x00010001

})

Name (PWT2, Package (0x05)

{

0x06030004,

"POWER Temperature",

0x01C2,

0x03B6,

0x00010001

})

Name (OPT3, Package (0x05)

{

0x06030005,

"OPT_FAN3 Temperature",

0x01C2,

0x03B6,

0x00010001

})

Name (OPT2, Package (0x05)

{

0x06030006,

"OPT_FAN2 Temperature",

0x01C2,

0x03B6,

0x00010001

})

Name (OPT1, Package (0x05)

{

0x06030007,

"OPT_FAN1 Temperature",

0x01C2,

0x03B6,

0x00010001

})

Name (TBUF, Package (0x09)

{

0x08,

CPUT,

MBT2,

SBT2,

NBT2,

PWT2,

OPT3,

OPT2,

OPT1

})

Method (TGET, 1, NotSerialized)

{

If (Arg0 == Zero)

{

Return (^^SIOR.HWT1 ())

}

If (Arg0 == One)

{

Return (^^SIOR.MBT2 ())

}

If (Arg0 == 0x02)

{

Return (^^SIOR.SBT2 ())

}

If (Arg0 == 0x03)

{

Return (^^SIOR.NBT2 ())

}

If (Arg0 == 0x04)

{

Return (^^SIOR.PWT2 ())

}

If (Arg0 == 0x05)

{

Return (^^SIOR.OPT3 ())

}

If (Arg0 == 0x06)

{

Return (^^SIOR.OPT2 ())

}

If (Arg0 == 0x07)

{

Return (^^SIOR.OPT1 ())

}

}

Name (CPUF, Package (0x05)

{

0x06040000,

"CPU FAN Speed",

0x0258,

0x1C20,

0x00010001

})

Name (ECF1, Package (0x05)

{

0x06040001,

"CH_FAN1 Speed",

0x0258,

0x1C20,

0x00010001

})

Name (ECF2, Package (0x05)

{

0x06040002,

"CH_FAN2 Speed",

0x0258,

0x1C20,

0x00010001

})

Name (ECF3, Package (0x05)

{

0x06040003,

"CH_FAN3 Speed",

0x0258,

0x1C20,

0x00010001

})

Name (ECPF, Package (0x05)

{

0x06040004,

"Power_FAN Speed",

0x0258,

0x1C20,

0x00010001

})

Name (OPF1, Package (0x05)

{

0x06040005,

"OPT1_FAN Speed",

0x0258,

0x1C20,

0x00010001

})

Name (OPF2, Package (0x05)

{

0x06040006,

"OPT2_FAN Speed",

0x0258,

0x1C20,

0x00010001

})

Name (OPF3, Package (0x05)

{

0x06040007,

"OPT3_FAN Speed",

0x0258,

0x1C20,

0x00010001

})

Name (FBUF, Package (0x09)

{

0x08,

CPUF,

ECF1,

ECF2,

ECF3,

ECPF,

OPF1,

OPF2,

OPF3

})

Method (FGET, 1, NotSerialized)

{

If (Arg0 == Zero)

{

Return (^^SIOR.HWF1 ())

}

If (Arg0 == One)

{

Return (^^SIOR.HWFA ())

}

If (Arg0 == 0x02)

{

Return (^^SIOR.HWFB ())

}

If (Arg0 == 0x03)

{

Return (^^SIOR.HWFC ())

}

If (Arg0 == 0x04)

{

Return (^^SIOR.HWF6 ())

}

If (Arg0 == 0x05)

{

Return (^^SIOR.HWF9 ())

}

If (Arg0 == 0x06)

{

Return (^^SIOR.HWF8 ())

}

If (Arg0 == 0x07)

{

Return (^^SIOR.HWF7 ())

}

}

Method (VSIF, 0, NotSerialized)

{

Return (VBUF) /* \_SB_.PCI0.SBRG.ASOC.VBUF */

}

Method (RVLT, 1, NotSerialized)

{

Local0 = (Arg0 & 0xFFFF)

Local1 = VGET (Local0)

Local2 = DerefOf (DerefOf (VPAR [Local0]) [Zero])

Local3 = DerefOf (DerefOf (VPAR [Local0]) [One])

Local4 = DerefOf (DerefOf (VPAR [Local0]) [0x02])

Local5 = (Local1 * (Local2 + Local3))

Local5 /= Local3

Local5 += Local4

Return (Local5)

}

Method (SVLT, 1, NotSerialized)

{

Local0 = (DerefOf (Arg0 [Zero]) & 0xFFFF)

Local1 = DerefOf (VBUF [Zero])

If (Local0 >= Local1)

{

Return (Zero)

}

Local0++

DerefOf (VBUF [Local0]) [One] = DerefOf (Arg0 [

One])

DerefOf (VBUF [Local0]) [0x02] = DerefOf (Arg0 [

0x02])

DerefOf (VBUF [Local0]) [0x03] = DerefOf (Arg0 [

0x03])

DerefOf (VBUF [Local0]) [0x04] = DerefOf (Arg0 [

0x04])

Return (One)

}

Method (TSIF, 0, NotSerialized)

{

Return (TBUF) /* \_SB_.PCI0.SBRG.ASOC.TBUF */

}

Method (RTMP, 1, NotSerialized)

{

Local0 = (Arg0 & 0xFFFF)

Local1 = TGET (Local0)

Return (Local1)

}

Method (STMP, 1, NotSerialized)

{

Local0 = (DerefOf (Arg0 [Zero]) & 0xFFFF)

Local1 = DerefOf (TBUF [Zero])

If (Local0 >= Local1)

{

Return (Zero)

}

Local0++

DerefOf (TBUF [Local0]) [One] = DerefOf (Arg0 [

One])

DerefOf (TBUF [Local0]) [0x02] = DerefOf (Arg0 [

0x02])

DerefOf (TBUF [Local0]) [0x03] = DerefOf (Arg0 [

0x03])

DerefOf (TBUF [Local0]) [0x04] = DerefOf (Arg0 [

0x04])

Return (One)

}

Method (FSIF, 0, NotSerialized)

{

Return (FBUF) /* \_SB_.PCI0.SBRG.ASOC.FBUF */

}

Method (RFAN, 1, NotSerialized)

{

Local0 = (Arg0 & 0xFFFF)

Local1 = FGET (Local0)

Return (Local1)

}

Method (SFAN, 1, NotSerialized)

{

Local0 = (DerefOf (Arg0 [Zero]) & 0xFFFF)

Local1 = DerefOf (FBUF [Zero])

If (Local0 >= Local1)

{

Return (Zero)

}

Local0++

DerefOf (FBUF [Local0]) [One] = DerefOf (Arg0 [

One])

DerefOf (FBUF [Local0]) [0x02] = DerefOf (Arg0 [

0x02])

DerefOf (FBUF [Local0]) [0x03] = DerefOf (Arg0 [

0x03])

DerefOf (FBUF [Local0]) [0x04] = DerefOf (Arg0 [

0x04])

DerefOf (FBUF [Local0]) [0x05] = DerefOf (Arg0 [

0x05])

Return (One)

}

}

Scope (_SB)

{

Scope (PCI0)

{

Name (CRS, ResourceTemplate ()

{

WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,

0x0000, // Granularity

0x0000, // Range Minimum

0x00FF, // Range Maximum

0x0000, // Translation Offset

0x0100, // Length

,, )

IO (Decode16,

0x0CF8, // Range Minimum

0x0CF8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x0000, // Granularity

0x0000, // Range Minimum

0x0CF7, // Range Maximum

0x0000, // Translation Offset

0x0CF8, // Length

,, , TypeStatic)

WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x0000, // Granularity

0x0D00, // Range Minimum

0xFFFF, // Range Maximum

0x0000, // Translation Offset

0xF300, // Length

,, , TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000A0000, // Range Minimum

0x000BFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00020000, // Length

,, , AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C0000, // Range Minimum

0x000DFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00020000, // Length

,, _Y19, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x00000000, // Range Minimum

0x00000000, // Range Maximum

0x00000000, // Translation Offset

0x00000000, // Length

,, _Y1A, AddressRangeMemory, TypeStatic)

})

CreateDWordField (CRS, \_SB.PCI0._Y19._MIN, MIN5) // _MIN: Minimum Base Address

CreateDWordField (CRS, \_SB.PCI0._Y19._MAX, MAX5) // _MAX: Maximum Base Address

CreateDWordField (CRS, \_SB.PCI0._Y19._LEN, LEN5) // _LEN: Length

CreateDWordField (CRS, \_SB.PCI0._Y1A._MIN, MIN6) // _MIN: Minimum Base Address

CreateDWordField (CRS, \_SB.PCI0._Y1A._MAX, MAX6) // _MAX: Maximum Base Address

CreateDWordField (CRS, \_SB.PCI0._Y1A._LEN, LEN6) // _LEN: Length

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Local0 = MG1L /* \MG1L */

If (Local0)

{

MIN5 = MG1B /* \MG1B */

LEN5 = MG1L /* \MG1L */

MAX5 = (MIN5 + Local0--)

}

MIN6 = MG2B /* \MG2B */

LEN6 = MG2L /* \MG2L */

Local0 = MG2L /* \MG2L */

MAX6 = (MIN6 + Local0--)

Return (CRS) /* \_SB_.PCI0.CRS_ */

}

}

}

Name (WOTB, Zero)

Name (WSSB, Zero)

Name (WAXB, Zero)

Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep

{

If (Arg0 == 0x05) {}

Else

{

DBG8 = Arg0

PTS (Arg0)

WAKP [Zero] = Zero

WAKP [One] = Zero

If ((Arg0 == 0x04) && (OSFL () == 0x02))

{

Sleep (0x0BB8)

}

WSSB = ASSB /* \ASSB */

WOTB = AOTB /* \AOTB */

WAXB = AAXB /* \AAXB */

ASSB = Arg0

AOTB = OSFL ()

AAXB = Zero

}

}

Method (_WAK, 1, NotSerialized) // _WAK: Wake

{

If ((Arg0 < One) || (Arg0 > 0x05))

{

Arg0 = 0x03

}

DBG8 = (Arg0 << 0x04)

WAK (Arg0)

If (IOWK) {}

Else

{

Notify (\_SB.PWRB, 0x02) // Device Wake

}

If (ASSB)

{

ASSB = WSSB /* \WSSB */

AOTB = WOTB /* \WOTB */

AAXB = WAXB /* \WAXB */

}

If (DerefOf (WAKP [Zero]))

{

WAKP [One] = Zero

}

Else

{

WAKP [One] = Arg0

}

Return (WAKP) /* \WAKP */

}

OperationRegion (IORK, SystemIO, 0xB3, One)

Field (IORK, ByteAcc, NoLock, Preserve)

{

IOWK, 8

}

Name (_S0, Package (0x04) // _S0_: S0 System State

{

Zero,

Zero,

Zero,

Zero

})

If (SS1)

{

Name (_S1, Package (0x04) // _S1_: S1 System State

{

One,

Zero,

Zero,

Zero

})

}

If (SS3)

{

Name (_S3, Package (0x04) // _S3_: S3 System State

{

0x05,

Zero,

Zero,

Zero

})

}

If (SS4)

{

Name (_S4, Package (0x04) // _S4_: S4 System State

{

0x06,

Zero,

Zero,

Zero

})

}

Name (_S5, Package (0x04) // _S5_: S5 System State

{

0x07,

Zero,

Zero,

Zero

})

Method (PTS, 1, NotSerialized)

{

If (Arg0)

{

\_SB.PCI0.SBRG.SIOS (Arg0)

\_SB.PCI0.SBRG.SPTS (Arg0)

\_SB.PCI0.NPTS (Arg0)

}

}

Method (WAK, 1, NotSerialized)

{

\_SB.PCI0.SBRG.SIOW (Arg0)

\_SB.PCI0.SBRG.SWAK (Arg0)

\_SB.PCI0.NWAK (Arg0)

}

Method (DTGP, 5, NotSerialized)

{

If (Arg0 == ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"))

{

If (Arg1 == One)

{

If (Arg2 == Zero)

{

Arg4 = Buffer (One)

{

0x03 /* . */

}

Return (One)

}

If (Arg2 == One)

{

Return (One)

}

}

}

Arg4 = Buffer (One)

{

0x00 /* . */

}

Return (Zero)

}

}

Fixed ACPI Description Table

View File FACP.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/FACP.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [FACP]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]

[004h 0004 4] Table Length : 000000F4

[008h 0008 1] Revision : 04

[009h 0009 1] Checksum : 07

[00Ah 0010 6] Oem ID : "Apple "

[010h 0016 8] Oem Table ID : "OEMFACP "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

// ACPI Warning: Input FADT revision 4 does not match expected length: found 0xF4 expected 0x100

[024h 0036 4] FACS Address : CFF8E000

[028h 0040 4] DSDT Address : CFC21000

[02Ch 0044 1] Model : 00

[02Dh 0045 1] PM Profile : 01 [Desktop]

[02Eh 0046 2] SCI Interrupt : 0009

[030h 0048 4] SMI Command Port : 000000B2

[034h 0052 1] ACPI Enable Value : E1

[035h 0053 1] ACPI Disable Value : 1E

[036h 0054 1] S4BIOS Command : 00

[037h 0055 1] P-State Control : E2

[038h 0056 4] PM1A Event Block Address : 00000800

[03Ch 0060 4] PM1B Event Block Address : 00000000

[040h 0064 4] PM1A Control Block Address : 00000804

[044h 0068 4] PM1B Control Block Address : 00000000

[048h 0072 4] PM2 Control Block Address : 00000850

[04Ch 0076 4] PM Timer Block Address : 00000808

[050h 0080 4] GPE0 Block Address : 00000820

[054h 0084 4] GPE1 Block Address : 00000000

[058h 0088 1] PM1 Event Block Length : 04

[059h 0089 1] PM1 Control Block Length : 02

[05Ah 0090 1] PM2 Control Block Length : 01

[05Bh 0091 1] PM Timer Block Length : 04

[05Ch 0092 1] GPE0 Block Length : 10

[05Dh 0093 1] GPE1 Block Length : 00

[05Eh 0094 1] GPE1 Base Offset : 00

[05Fh 0095 1] _CST Support : E3

[060h 0096 2] C2 Latency : 0065

[062h 0098 2] C3 Latency : 03E9

[064h 0100 2] CPU Cache Size : 0400

[066h 0102 2] Cache Flush Stride : 0010

[068h 0104 1] Duty Cycle Offset : 01

[069h 0105 1] Duty Cycle Width : 00

[06Ah 0106 1] RTC Day Alarm Index : 0D

[06Bh 0107 1] RTC Month Alarm Index : 00

[06Ch 0108 1] RTC Century Index : 32

[06Dh 0109 2] Boot Flags (decoded below) : 0003

Legacy Devices Supported (V2) : 1

8042 Present on ports 60/64 (V2) : 1

VGA Not Present (V4) : 0

MSI Not Supported (V4) : 0

PCIe ASPM Not Supported (V4) : 0

CMOS RTC Not Present (V5) : 0

[06Fh 0111 1] Reserved : 00

[070h 0112 4] Flags (decoded below) : 000004A5

WBINVD instruction is operational (V1) : 1

WBINVD flushes all caches (V1) : 0

All CPUs support C1 (V1) : 1

C2 works on MP system (V1) : 0

Control Method Power Button (V1) : 0

Control Method Sleep Button (V1) : 1

RTC wake not in fixed reg space (V1) : 0

RTC can wake system from S4 (V1) : 1

32-bit PM Timer (V1) : 0

Docking Supported (V1) : 0

Reset Register Supported (V2) : 1

Sealed Case (V3) : 0

Headless - No Video (V3) : 0

Use native instr after SLP_TYPx (V3) : 0

PCIEXP_WAK Bits Supported (V4) : 0

Use Platform Timer (V4) : 0

RTC_STS valid on S4 wake (V4) : 0

Remote Power-on capable (V4) : 0

Use APIC Cluster Model (V4) : 0

Use APIC Physical Destination Mode (V4) : 0

Hardware Reduced (V5) : 0

Low Power S0 Idle (V5) : 0

[074h 0116 12] Reset Register : [Generic Address Structure]

[074h 0116 1] Space ID : 01 [SystemIO]

[075h 0117 1] Bit Width : 08

[076h 0118 1] Bit Offset : 00

[077h 0119 1] Encoded Access Width : 01 [Byte Access:8]

[078h 0120 8] Address : 0000000000000CF9

[080h 0128 1] Value to cause reset : 06

[081h 0129 2] ARM Flags (decoded below) : 0000

PSCI Compliant : 0

Must use HVC for PSCI : 0

[083h 0131 1] FADT Minor Revision : 00

[084h 0132 8] FACS Address : 00000000CFF8E000

[08Ch 0140 8] DSDT Address : 00000000CFC21000

[094h 0148 12] PM1A Event Block : [Generic Address Structure]

[094h 0148 1] Space ID : 01 [SystemIO]

[095h 0149 1] Bit Width : 20

[096h 0150 1] Bit Offset : 00

[097h 0151 1] Encoded Access Width : 03 [DWord Access:32]

[098h 0152 8] Address : 0000000000000800

[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]

[0A0h 0160 1] Space ID : 01 [SystemIO]

[0A1h 0161 1] Bit Width : 00

[0A2h 0162 1] Bit Offset : 00

[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]

[0A4h 0164 8] Address : 0000000000000000

[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]

[0ACh 0172 1] Space ID : 01 [SystemIO]

[0ADh 0173 1] Bit Width : 10

[0AEh 0174 1] Bit Offset : 00

[0AFh 0175 1] Encoded Access Width : 02 [Word Access:16]

[0B0h 0176 8] Address : 0000000000000804

[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]

[0B8h 0184 1] Space ID : 01 [SystemIO]

[0B9h 0185 1] Bit Width : 00

[0BAh 0186 1] Bit Offset : 00

[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]

[0BCh 0188 8] Address : 0000000000000000

[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]

[0C4h 0196 1] Space ID : 01 [SystemIO]

[0C5h 0197 1] Bit Width : 08

[0C6h 0198 1] Bit Offset : 00

[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]

[0C8h 0200 8] Address : 0000000000000850

[0D0h 0208 12] PM Timer Block : [Generic Address Structure]

[0D0h 0208 1] Space ID : 01 [SystemIO]

[0D1h 0209 1] Bit Width : 20

[0D2h 0210 1] Bit Offset : 00

[0D3h 0211 1] Encoded Access Width : 03 [DWord Access:32]

[0D4h 0212 8] Address : 0000000000000808

[0DCh 0220 12] GPE0 Block : [Generic Address Structure]

[0DCh 0220 1] Space ID : 01 [SystemIO]

[0DDh 0221 1] Bit Width : 80

[0DEh 0222 1] Bit Offset : 00

[0DFh 0223 1] Encoded Access Width : 04 [QWord Access:64]

[0E0h 0224 8] Address : 0000000000000820

[0E8h 0232 12] GPE1 Block : [Generic Address Structure]

[0E8h 0232 1] Space ID : 01 [SystemIO]

[0E9h 0233 1] Bit Width : 00

[0EAh 0234 1] Bit Offset : 00

[0EBh 0235 1] Encoded Access Width : 04 [QWord Access:64]

[0ECh 0236 8] Address : 0000000000000000

Raw Table Data: Length 244 (0xF4)

0000: 46 41 43 50 F4 00 00 00 04 07 41 70 70 6C 65 20 // FACP......Apple

0010: 4F 45 4D 46 41 43 50 20 13 09 00 04 4D 53 46 54 // OEMFACP ....MSFT

0020: 97 00 00 00 00 E0 F8 CF 00 10 C2 CF 00 01 09 00 // ................

0030: B2 00 00 00 E1 1E 00 E2 00 08 00 00 00 00 00 00 // ................

0040: 04 08 00 00 00 00 00 00 50 08 00 00 08 08 00 00 // ........P.......

0050: 20 08 00 00 00 00 00 00 04 02 01 04 10 00 00 E3 // ...............

0060: 65 00 E9 03 00 04 10 00 01 00 0D 00 32 03 00 00 // e...........2...

0070: A5 04 00 00 01 08 00 01 F9 0C 00 00 00 00 00 00 // ................

0080: 06 00 00 00 00 E0 F8 CF 00 00 00 00 00 10 C2 CF // ................

0090: 00 00 00 00 01 20 00 03 00 08 00 00 00 00 00 00 // ..... ..........

00A0: 01 00 00 00 00 00 00 00 00 00 00 00 01 10 00 02 // ................

00B0: 04 08 00 00 00 00 00 00 01 00 00 00 00 00 00 00 // ................

00C0: 00 00 00 00 01 08 00 00 50 08 00 00 00 00 00 00 // ........P.......

00D0: 01 20 00 03 08 08 00 00 00 00 00 00 01 80 00 04 // . ..............

00E0: 20 08 00 00 00 00 00 00 01 00 00 04 00 00 00 00 // ...............

00F0: 00 00 00 00 // ....

Firmware ACPI Control Structure

View File FACS.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/FACS.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [FACS]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "FACS"

[004h 0004 4] Length : 00000040

[008h 0008 4] Hardware Signature : 00000000

[00Ch 0012 4] 32 Firmware Waking Vector : 00000000

[010h 0016 4] Global Lock : 00000000

[014h 0020 4] Flags (decoded below) : 00000000

S4BIOS Support Present : 0

64-bit Wake Supported (V2) : 0

[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000

[020h 0032 1] Version : 02

[021h 0033 3] Reserved : 000000

[024h 0036 4] OspmFlags (decoded below) : 00000000

64-bit Wake Env Required (V2) : 0

Raw Table Data: Length 64 (0x40)

0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@...........

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0020: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

High Precision Event Timer Table

View File HPET.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/HPET.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [HPET]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]

[004h 0004 4] Table Length : 00000038

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : DA

[00Ah 0010 6] Oem ID : "A_M_I_"

[010h 0016 8] Oem Table ID : "OEMHPET "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 4] Hardware Block ID : 8086A301

[028h 0040 12] Timer Block Register : [Generic Address Structure]

[028h 0040 1] Space ID : 00 [SystemMemory]

[029h 0041 1] Bit Width : 08

[02Ah 0042 1] Bit Offset : 00

[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]

[02Ch 0044 8] Address : 00000000FED00000

[034h 0052 1] Sequence Number : 00

[035h 0053 2] Minimum Clock Ticks : 37EE

[037h 0055 1] Flags (decoded below) : 00

4K Page Protect : 0

64K Page Protect : 0

Raw Table Data: Length 56 (0x38)

0000: 48 50 45 54 38 00 00 00 01 DA 41 5F 4D 5F 49 5F // HPET8.....A_M_I_

0010: 4F 45 4D 48 50 45 54 20 13 09 00 04 4D 53 46 54 // OEMHPET ....MSFT

0020: 97 00 00 00 01 A3 86 80 00 08 00 00 00 00 D0 FE // ................

0030: 00 00 00 00 00 EE 37 00 // ......7.

PCI Express memory mapped configuration space base address Description Table

View File MCFG.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/MCFG.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [MCFG]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]

[004h 0004 4] Table Length : 0000003C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : C4

[00Ah 0010 6] Oem ID : "A_M_I_"

[010h 0016 8] Oem Table ID : "OEMMCFG "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 8] Reserved : 0000000000000000

[02Ch 0044 8] Base Address : 00000000E0000000

[034h 0052 2] Segment Group Number : 0000

[036h 0054 1] Start Bus Number : 00

[037h 0055 1] End Bus Number : FF

[038h 0056 4] Reserved : 00000000

Raw Table Data: Length 60 (0x3C)

0000: 4D 43 46 47 3C 00 00 00 01 C4 41 5F 4D 5F 49 5F // MCFG<.....A_M_I_

0010: 4F 45 4D 4D 43 46 47 20 13 09 00 04 4D 53 46 54 // OEMMCFG ....MSFT

0020: 97 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E0 // ................

0030: 00 00 00 00 00 00 00 FF 00 00 00 00 // ............

OEM Specific Information Tables

View File OEMB.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/OEMB.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [OEMB]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "OEMB"

[004h 0004 4] Table Length : 00000081

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : D2 /* Incorrect checksum, should be CA */

[00Ah 0010 6] Oem ID : "A_M_I_"

[010h 0016 8] Oem Table ID : "AMI_OEM "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

**** OEM-defined ACPI table [OEMB], unknown contents

Raw Table Data: Length 129 (0x81)

0000: 4F 45 4D 42 81 00 00 00 01 D2 41 5F 4D 5F 49 5F // OEMB......A_M_I_

0010: 41 4D 49 5F 4F 45 4D 20 13 09 00 04 4D 53 46 54 // AMI_OEM ....MSFT

0020: 97 00 00 00 0D 08 00 00 00 00 D0 00 00 E0 FF 00 // ................

0030: 00 0D 00 00 00 01 00 00 00 00 D0 00 00 00 30 00 // ..............0.

0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0070: 00 00 00 00 00 00 00 00 00 00 00 00 87 10 FE 0E // ................

0080: 00 // .

Unknown table description.

View File OSFR.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/OSFR.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [OSFR]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "OSFR"

[004h 0004 4] Table Length : 000000B0

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : A1

[00Ah 0010 6] Oem ID : "A_M_I_"

[010h 0016 8] Oem Table ID : "OEMOSFR "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

**** Unknown ACPI table signature [OSFR]

Raw Table Data: Length 176 (0xB0)

0000: 4F 53 46 52 B0 00 00 00 01 A1 41 5F 4D 5F 49 5F // OSFR......A_M_I_

0010: 4F 45 4D 4F 53 46 52 20 13 09 00 04 4D 53 46 54 // OEMOSFR ....MSFT

0020: 97 00 00 00 01 00 00 00 2C 00 00 00 3D 13 6F B4 // ........,...=.o.

0030: 5F 23 34 46 9F 03 B1 C0 1C 54 78 5B 00 00 00 00 // _#4F.....Tx[....

0040: 90 00 00 00 70 00 00 00 00 00 00 00 50 00 00 00 // ....p.......P...

0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0070: 4E 00 61 00 6D 00 65 00 00 00 00 00 00 00 00 00 // N.a.m.e.........

0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

0090: 4D 00 61 00 6E 00 75 00 00 00 00 00 00 00 00 00 // M.a.n.u.........

00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................

Root System Description Table

View File RSDT.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/RSDT.aml, Fri May 25 11:52:47 2018

*

* ACPI Data Table [XSDT]

*

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

*/

[000h 0000 4] Signature : "XSDT" [Extended System Description Table]

[004h 0004 4] Table Length : 0000006C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 56

[00Ah 0010 6] Oem ID : "A_M_I_"

[010h 0016 8] Oem Table ID : "OEMRSDT "

[018h 0024 4] Oem Revision : 04000913

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 8] ACPI Table Address 0 : 00000000CFC2D000

[02Ch 0044 8] ACPI Table Address 1 : 00000000CFF80390

[034h 0052 8] ACPI Table Address 2 : 00000000CFF80400

[03Ch 0060 8] ACPI Table Address 3 : 00000000CFF8E040

[044h 0068 8] ACPI Table Address 4 : 00000000CFF8A680

[04Ch 0076 8] ACPI Table Address 5 : 00000000CFF8A6C0

[054h 0084 8] ACPI Table Address 6 : 00000000CFC1F000

[05Ch 0092 8] ACPI Table Address 7 : 00000000CFC1E000

[064h 0100 8] ACPI Table Address 8 : 00000000CFC1D000

Raw Table Data: Length 108 (0x6C)

0000: 58 53 44 54 6C 00 00 00 01 56 41 5F 4D 5F 49 5F // XSDTl....VA_M_I_

0010: 4F 45 4D 52 53 44 54 20 13 09 00 04 4D 53 46 54 // OEMRSDT ....MSFT

0020: 97 00 00 00 00 D0 C2 CF 00 00 00 00 90 03 F8 CF // ................

0030: 00 00 00 00 00 04 F8 CF 00 00 00 00 40 E0 F8 CF // ............@...

0040: 00 00 00 00 80 A6 F8 CF 00 00 00 00 C0 A6 F8 CF // ................

0050: 00 00 00 00 00 F0 C1 CF 00 00 00 00 00 E0 C1 CF // ................

0060: 00 00 00 00 00 D0 C1 CF 00 00 00 00 // ............

Secondary System Description Table

View File SSDT-1.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembling to symbolic ASL+ operators

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/SSDT-1.aml, Fri May 25 11:52:47 2018

*

* Original Table Header:

* Signature "SSDT"

* Length 0x0000022B (555)

* Revision 0x01

* Checksum 0x61

* OEM ID "PmRef"

* OEM Table ID "CpuPm"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120320 (538051360)

*/

DefinitionBlock ("", "SSDT", 1, "PmRef", "CpuPm", 0x00003000)

{

External (_PR_.P001, ProcessorObj)

External (_PR_.P002, ProcessorObj)

External (_PR_.P003, ProcessorObj)

External (_PR_.P004, ProcessorObj)

Scope (\_PR.P001)

{

Name (PSS, Package (0x05)

{

Package (0x06)

{

0x00000B72,

0x00005B90,

0x0000000A,

0x0000000A,

0x00000A26,

0x00000A26

},

Package (0x06)

{

0x00000A4D,

0x00005268,

0x0000000A,

0x0000000A,

0x00000926,

0x00000926

},

Package (0x06)

{

0x00000928,

0x00004940,

0x0000000A,

0x0000000A,

0x00000826,

0x00000826

},

Package (0x06)

{

0x00000803,

0x00004018,

0x0000000A,

0x0000000A,

0x00000726,

0x00000726

},

Package (0x06)

{

0x000006DE,

0x000036F0,

0x0000000A,

0x0000000A,

0x00000626,

0x00000626

}

})

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (PSS) /* \_PR_.P001.PSS_ */

}

Name (_PPC, Zero) // _PPC: Performance Present Capabilities

Name (PCT, Package (0x02)

{

ResourceTemplate ()

{

Register (FFixedHW,

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

,)

},

ResourceTemplate ()

{

Register (FFixedHW,

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

,)

}

})

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (PCT) /* \_PR_.P001.PCT_ */

}

Name (APSN, Zero)

}

Scope (\_PR.P002)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.P001.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities

{

Return (\_PR.P001._PPC)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.P001.PCT)

}

}

Scope (\_PR.P003)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.P001.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities

{

Return (\_PR.P001._PPC)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.P001.PCT)

}

}

Scope (\_PR.P004)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.P001.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilities

{

Return (\_PR.P001._PPC)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.P001.PCT)

}

}

}

Secondary System Description Table

View File SSDT-2.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembling to symbolic ASL+ operators

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/SSDT-2.aml, Fri May 25 11:52:47 2018

*

* Original Table Header:

* Signature "SSDT"

* Length 0x000000D0 (208)

* Revision 0x01

* Checksum 0x3A

* OEM ID "PmRefA"

* OEM Table ID "CpuCst"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120320 (538051360)

*/

DefinitionBlock ("", "SSDT", 1, "PmRefA", "CpuCst", 0x00003000)

{

External (_PR_.P001, ProcessorObj)

External (_PR_.P002, ProcessorObj)

External (_PR_.P003, ProcessorObj)

External (_PR_.P004, ProcessorObj)

Scope (\_PR.P001)

{

Name (CST, Package (0x02)

{

One,

Package (0x04)

{

ResourceTemplate ()

{

Register (FFixedHW,

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000000, // Address

0x01, // Access Size

)

},

One,

0x0001,

0x000003E8

}

})

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (CST) /* \_PR_.P001.CST_ */

}

}

Scope (\_PR.P002)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.P001.CST)

}

}

Scope (\_PR.P003)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.P001.CST)

}

}

Scope (\_PR.P004)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.P001.CST)

}

}

}

Secondary System Description Table

View File SSDT.dsl

/*

* Intel ACPI Component Architecture

* AML/ASL+ Disassembler version 20160729-64

* Copyright (c) 2000 - 2016 Intel Corporation

*

* Disassembling to symbolic ASL+ operators

*

* Disassembly of /Users/manuel/Desktop/DarwinDumper_3.0.4_25.05_11.52.46_MacPro3,1_Clover_X64_4466_ElCapitan_15G18013_manuel/ACPI Tables/AML/SSDT.aml, Fri May 25 11:52:47 2018

*

* Original Table Header:

* Signature "SSDT"

* Length 0x00000A7C (2684)

* Revision 0x01

* Checksum 0x71

* OEM ID "DpgPmm"

* OEM Table ID "CpuPm"

* OEM Revision 0x00000012 (18)

* Compiler ID "INTL"

* Compiler Version 0x20060113 (537264403)

*/

DefinitionBlock ("", "SSDT", 1, "DpgPmm", "CpuPm", 0x00000012)

{

External (_PR_.P001, ProcessorObj)

External (_PR_.P002, ProcessorObj)

External (_PR_.P003, ProcessorObj)

External (_PR_.P004, ProcessorObj)

Scope (\)

{

Name (SSDT, Package (0x18)

{

"CPU0IST ",

0xCFF8E0D0,

0x000002B9,

"CPU1IST ",

0xCFF8E390,

0x000002B9,

"CPU2IST ",

0xCFF8E650,

0x000002B9,

"CPU3IST ",

0xCFF8E910,

0x000002B9,

"CPU4IST ",

0x80000000,

0x80000000,

"CPU5IST ",

0x80000000,

0x80000000,

"CPU6IST ",

0x80000000,

0x80000000,

"CPU7IST ",

0x80000000,

0x80000000

})

Name (CSDT, Package (0x18)

{

"CPU0CST ",

0x80000000,

0x80000000,

"CPU1CST ",

0x80000000,

0x80000000,

"CPU2CST ",

0x80000000,

0x80000000,

"CPU3CST ",

0x80000000,

0x80000000,

"CPU4CST ",

0x80000000,

0x80000000,

"CPU5CST ",

0x80000000,

0x80000000,

"CPU6CST ",

0x80000000,

0x80000000,

"CPU7CST ",

0x80000000,

0x80000000

})

Name (CFGD, 0x00000002)

Name (NCPU, 0x00000004)

Name (NPCP, 0x00000001)

Name (PDC0, 0x80000000)

Name (PDC1, 0x80000000)

Name (PDC2, 0x80000000)

Name (PDC3, 0x80000000)

Name (PDC4, 0x80000000)

Name (PDC5, 0x80000000)

Name (PDC6, 0x80000000)

Name (PDC7, 0x80000000)

Name (TBL0, 0x00)

Name (TBL1, 0x00)

Name (TBL2, 0x00)

Name (TBL3, 0x00)

Name (TBL4, 0x00)

Name (TBL5, 0x00)

Name (TBL6, 0x00)

Name (TBL7, 0x00)

Name (CTB0, 0x00)

Name (CTB1, 0x00)

Name (CTB2, 0x00)

Name (CTB3, 0x00)

OperationRegion (PMRG, SystemIO, 0x0800, 0x50)

Field (PMRG, ByteAcc, NoLock, Preserve)

{

Offset (0x41),

DEV4, 1,

DEV5, 1,

DEV6, 1,

DEV7, 1,

STS4, 1,

STS5, 1,

STS6, 1,

STS7, 1

}

}

Scope (\_PR.P001)

{

Name (HI0, 0x00)

Name (HC0, 0x00)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

CreateDWordField (Arg0, 0x00, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Local0 = SizeOf (Arg0)

Local1 = (Local0 - 0x08)

CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00 /* .... */

})

Concatenate (STS0, TEMP, Local2)

_OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

CreateDWordField (Arg3, 0x00, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, 0x00, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))

CreateDWordField (UID0, 0x00, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (!(((IID0 == EID0) && (IID1 == EID1)) && ((

IID2 == EID2) && (IID3 == EID3))))

{

STS0 [0x00] = 0x06

Return (Arg3)

}

If (Arg1 != 0x01)

{

STS0 [0x00] = 0x0A

Return (Arg3)

}

PDC0 = ((PDC0 & 0x7FFFFFFF) | CAP0) /* \_PR_.P001._OSC.CAP0 */

If ((((PDC0 & 0x09) == 0x09) && (TBL0 == Zero)) &&

((CFGD & 0x02) == 0x02))

{

TBL0 |= 0x01

OperationRegion (GV00, SystemMemory, DerefOf (SSDT [0x01]), DerefOf (SSDT [0x02]))

Load (GV00, HI0) /* \_PR_.P001.HI0_ */

}

If ((((PDC0 & 0x18) == 0x18) && (CTB0 == Zero)) &&

((CFGD & 0x20) == 0x20))

{

CTB0 |= 0x01

OperationRegion (CT00, SystemMemory, DerefOf (CSDT [0x01]), DerefOf (CSDT [0x02]))

Load (CT00, HC0) /* \_PR_.P001.HC0_ */

}

Return (Arg3)

}

}

Scope (\_PR.P002)

{

Name (HI1, 0x00)

Name (HC1, 0x00)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

CreateDWordField (Arg0, 0x00, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Local0 = SizeOf (Arg0)

Local1 = (Local0 - 0x08)

CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00 /* .... */

})

Concatenate (STS0, TEMP, Local2)

_OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

CreateDWordField (Arg3, 0x00, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, 0x00, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))

CreateDWordField (UID0, 0x00, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (!(((IID0 == EID0) && (IID1 == EID1)) && ((

IID2 == EID2) && (IID3 == EID3))))

{

STS0 [0x00] = 0x06

Return (Arg3)

}

If (Arg1 != 0x01)

{

STS0 [0x00] = 0x0A

Return (Arg3)

}

PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP0) /* \_PR_.P002._OSC.CAP0 */

If ((((PDC1 & 0x09) == 0x09) && (TBL1 == Zero)) &&

((CFGD & 0x02) == 0x02))

{

TBL1 |= 0x01

OperationRegion (GV01, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05]))

Load (GV01, HI1) /* \_PR_.P002.HI1_ */

}

If ((((PDC1 & 0x18) == 0x18) && (CTB1 == Zero)) &&

((CFGD & 0x20) == 0x20))

{

CTB1 |= 0x01

OperationRegion (CT01, SystemMemory, DerefOf (CSDT [0x04]), DerefOf (CSDT [0x05]))

Load (CT01, HC1) /* \_PR_.P002.HC1_ */

}

Return (Arg3)

}

}

Scope (\_PR.P003)

{

Name (HI2, 0x00)

Name (HC2, 0x00)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

CreateDWordField (Arg0, 0x00, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Local0 = SizeOf (Arg0)

Local1 = (Local0 - 0x08)

CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00 /* .... */

})

Concatenate (STS0, TEMP, Local2)

_OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

CreateDWordField (Arg3, 0x00, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, 0x00, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))

CreateDWordField (UID0, 0x00, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (!(((IID0 == EID0) && (IID1 == EID1)) && ((

IID2 == EID2) && (IID3 == EID3))))

{

STS0 [0x00] = 0x06

Return (Arg3)

}

If (Arg1 != 0x01)

{

STS0 [0x00] = 0x0A

Return (Arg3)

}

PDC2 = ((PDC2 & 0x7FFFFFFF) | CAP0) /* \_PR_.P003._OSC.CAP0 */

If ((((PDC2 & 0x09) == 0x09) && (TBL2 == Zero)) &&

((CFGD & 0x02) == 0x02))

{

TBL2 |= 0x01

OperationRegion (GV02, SystemMemory, DerefOf (SSDT [0x07]), DerefOf (SSDT [0x08]))

Load (GV02, HI2) /* \_PR_.P003.HI2_ */

}

If ((((PDC2 & 0x18) == 0x18) && (CTB2 == Zero)) &&

((CFGD & 0x20) == 0x20))

{

CTB2 |= 0x01

OperationRegion (CT02, SystemMemory, DerefOf (CSDT [0x07]), DerefOf (CSDT [0x08]))

Load (CT02, HC2) /* \_PR_.P003.HC2_ */

}

Return (Arg3)

}

}

Scope (\_PR.P004)

{

Name (HI3, 0x00)

Name (HC3, 0x00)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

CreateDWordField (Arg0, 0x00, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Local0 = SizeOf (Arg0)

Local1 = (Local0 - 0x08)

CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00 /* .... */

})

Concatenate (STS0, TEMP, Local2)

_OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

CreateDWordField (Arg3, 0x00, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, 0x00, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))

CreateDWordField (UID0, 0x00, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (!(((IID0 == EID0) && (IID1 == EID1)) && ((

IID2 == EID2) && (IID3 == EID3))))

{

STS0 [0x00] = 0x06

Return (Arg3)

}

If (Arg1 != 0x01)

{

STS0 [0x00] = 0x0A

Return (Arg3)

}

PDC3 = ((PDC3 & 0x7FFFFFFF) | CAP0) /* \_PR_.P004._OSC.CAP0 */

If ((((PDC3 & 0x09) == 0x09) && (TBL3 == Zero)) &&

((CFGD & 0x02) == 0x02))

{

TBL3 |= 0x01

OperationRegion (GV03, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B]))

Load (GV03, HI3) /* \_PR_.P004.HI3_ */

}

If ((((PDC3 & 0x18) == 0x18) && (CTB3 == Zero)) &&

((CFGD & 0x20) == 0x20))

{

CTB3 |= 0x01

OperationRegion (CT03, SystemMemory, DerefOf (CSDT [0x0A]), DerefOf (CSDT [0x0B]))

Load (CT03, HC3) /* \_PR_.P004.HC3_ */

}

Return (Arg3)

}

}

}

### Audio

- AudioCodecID
- VoodooHDAGetdump

Dumped using getcodecid by Andy Vandijck. Further developed by InsanelyDeepak, ErmaC and Micky1979.

View File AudioCodecID.txt

----------------------------------------

VoodooHDA

Codec: NVidia [Unknown] [10de:0040]

Controller: NVIDIA Corporation GK104 HDMI Audio Controller

Xeon E7 v2/Xeon E5 v2/Core i7 PCI Express Root Port 3c

----------------------------------------

VoodooHDA

Codec: Realtek ALC898 [10ec:0899]

Controller: Creative Labs 53c895a

PCI-AD/DA Analogue I/O board

USB Controller

Remote Access Card 4 Daughter Card Virtual UART

MPC8548 [PowerQUICC III]

YMF-754 [DS-1E Audio Controller]

OC-2325

SGH PSHAC GSN

Sound Core3D [Sound Blaster Recon3D / Z-Series]

AccelePort 8r EIA-422

CMIC-WS Host Bridge (GC-LE chipset)

Model 12 Road Runner Frame Grabber

7951 Security Processor

XP100 DSP Accelerator [XP100-P2]

SiByte BCM1280/BCM1480 System-on-a-Chip PCI-X

AR5211 Wireless Network Adapter [AR5001X 802.11ab]

SIS1100-e quad link

WebEnhance 200 GZIP Compression Card

SH7757 PCIe-PCI Bridge [PPB]

MPC8548E

GLint R5 rev A

Dumped using VoodooHDA v2.8.9 combined with VoodooHDA's getdump tool

View File VoodooHDAGetdump.txt

Found a device of class VoodooHDADevice: IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/P0P3@6/IOPP/HDAU@0,1/VoodooHDADevice

Probing codec #0...

HDA Codec #0: NVidia (Unknown)

HDA Codec ID: 0x10de0040

Vendor: 0x10de

Device: 0x0040

Revision: 0x01

Stepping: 0x00

PCI Subvendor: 0x28421462

startNode=1 endNode=2

Found audio FG nid=1 startNode=4 endNode=12 total=8

Processing audio FG cad=0 nid=1...

Powering up...

Parsing audio FG...

GPIO: 0x00000000 NumGPIO=0 NumGPO=0 NumGPI=0 GPIWake=0 GPIUnsol=0

nid 4 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

nid 5 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

nid 6 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

nid 7 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

Parsing vendor patch...

Nodes patching. Codec = 0

NumNodes = 2

VHDevice NID= 4 Config=185600f0 (pin: Digital-o) Cap=09000094 Ctrl=00000000 -- Conns: 0=8 1=9 2=10 3=11

VHDevice NID= 5 Config=185600f0 (pin: Digital-o) Cap=09000094 Ctrl=00000000 -- Conns: 0=8 1=9 2=10 3=11

VHDevice NID= 6 Config=185600f0 (pin: Digital-o) Cap=09000094 Ctrl=00000000 -- Conns: 0=8 1=9 2=10 3=11

VHDevice NID= 7 Config=185600f0 (pin: Digital-o) Cap=09000094 Ctrl=00000000 -- Conns: 0=8 1=9 2=10 3=11

VHDevice NID= 8 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID= 9 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=10 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=11 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

Parsing Ctls...

Disabling nonaudio...

Disabling useless...

Patched pins configuration:

nid 4 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

nid 5 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

nid 6 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

nid 7 0x185600f0 as 15 seq 0 Digital-out Jack Digital Special Internal Unknown misc 0

Parsing pin associations...

4 associations found:

Association 0 (15) out:

Pin nid=4 seq=0

Redir type=-1 jack=0 def=-1

Association 1 (15) out:

Pin nid=5 seq=0

Redir type=-1 jack=0 def=-1

Association 2 (15) out:

Pin nid=6 seq=0

Redir type=-1 jack=0 def=-1

Association 3 (15) out:

Pin nid=7 seq=0

Redir type=-1 jack=0 def=-1

Building AFG tree...

Tracing association 0 (15)

Tracing pin 4 with min nid 0

nid 8 returned 8

nid 9 returned 9

nid 10 returned 10

nid 11 returned 11

nid 4 returned 8

Pin 4 traced to DAC 8

Association 0 (15) trace succeeded

Tracing association 1 (15)

Tracing pin 5 with min nid 0

nid 8 busy by association 0

nid 9 returned 9

nid 10 returned 10

nid 11 returned 11

nid 5 returned 9

Pin 5 traced to DAC 9

Association 1 (15) trace succeeded

Tracing association 2 (15)

Tracing pin 6 with min nid 0

nid 8 busy by association 0

nid 9 busy by association 1

nid 10 returned 10

nid 11 returned 11

nid 6 returned 10

Pin 6 traced to DAC 10

Association 2 (15) trace succeeded

Tracing association 3 (15)

Tracing pin 7 with min nid 0

nid 8 busy by association 0

nid 9 busy by association 1

nid 10 busy by association 2

nid 11 returned 11

nid 7 returned 11

Pin 7 traced to DAC 11

Association 3 (15) trace succeeded

Tracing input monitor

Tracing other input monitors

Tracing beeper

Disabling unassociated widgets...

Disabling nonselected inputs...

Disabling useless...

Disabling crossassociated connections...

Disabling useless...

Binding associations to channels...

Assigning names to signal sources...

Assigning mixers to the tree...

Preparing pin controls...

AFG commit...

Creating PCM devices...

pcmAttach: HDA NVidia (Unknown) PCM #0 DisplayPort at cad 0 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Playback:

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

DAC: 8

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Playback:

nid=4 [pin: Digital-out (HDMI)]

+ <- nid=8 [audio output] [src: pcm] bindSeq=00000001

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

OSS mixer initialization...

Registering PCM channels...

pcmAttach: HDA NVidia (Unknown) PCM #1 DisplayPort at cad 0 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Playback:

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

DAC: 9

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Playback:

nid=5 [pin: Digital-out (HDMI)]

+ <- nid=9 [audio output] [src: pcm] bindSeq=00000001

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

OSS mixer initialization...

Registering PCM channels...

pcmAttach: HDA NVidia (Unknown) PCM #2 DisplayPort at cad 0 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Playback:

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

DAC: 10

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Playback:

nid=6 [pin: Digital-out (HDMI)]

+ <- nid=10 [audio output] [src: pcm] bindSeq=00000001

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

OSS mixer initialization...

Registering PCM channels...

pcmAttach: HDA NVidia (Unknown) PCM #3 DisplayPort at cad 0 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Playback:

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

DAC: 11

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Playback:

nid=7 [pin: Digital-out (HDMI)]

+ <- nid=11 [audio output] [src: pcm] bindSeq=00000001

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

OSS mixer initialization...

Registering PCM channels...

FG config/quirks: forcestereo ivref50 ivref80 ivref100 ivref

HP switch init...

+-------------------+

| DUMPING HDA NODES |

+-------------------+

Default Parameter

-----------------

IN amp: 0x00000000

OUT amp: 0x00000000

nid: 4

Name: pin: Digital-out (HDMI)

Widget cap: 0x00407381

CP DIGITAL UNSOL 8CH

Association: 0 (0x00000001)

Pin cap: 0x09000094

PDC OUT HDMI DP HBR

Pin config: 0x185600f0

Pin control: 0x00000040 OUT

connections: 4 enabled 1

+ <- nid=8 [audio output] (selected)

+ [DISABLED] <- nid=9 [audio output]

+ [DISABLED] <- nid=10 [audio output]

+ [DISABLED] <- nid=11 [audio output]

nid: 5

Name: pin: Digital-out (HDMI)

Widget cap: 0x00407381

CP DIGITAL UNSOL 8CH

Association: 1 (0x00000001)

Pin cap: 0x09000094

PDC OUT HDMI DP HBR

Pin config: 0x185600f0

Pin control: 0x00000040 OUT

connections: 4 enabled 1

+ [DISABLED] <- nid=8 [audio output]

+ <- nid=9 [audio output] (selected)

+ [DISABLED] <- nid=10 [audio output]

+ [DISABLED] <- nid=11 [audio output]

nid: 6

Name: pin: Digital-out (HDMI)

Widget cap: 0x00407381

CP DIGITAL UNSOL 8CH

Association: 2 (0x00000001)

Pin cap: 0x09000094

PDC OUT HDMI DP HBR

Pin config: 0x185600f0

Pin control: 0x00000040 OUT

connections: 4 enabled 1

+ [DISABLED] <- nid=8 [audio output]

+ [DISABLED] <- nid=9 [audio output]

+ <- nid=10 [audio output] (selected)

+ [DISABLED] <- nid=11 [audio output]

nid: 7

Name: pin: Digital-out (HDMI)

Widget cap: 0x00407381

CP DIGITAL UNSOL 8CH

Association: 3 (0x00000001)

Pin cap: 0x09000094

PDC OUT HDMI DP HBR

Pin config: 0x185600f0

Pin control: 0x00000040 OUT

connections: 4 enabled 1

+ [DISABLED] <- nid=8 [audio output]

+ [DISABLED] <- nid=9 [audio output]

+ [DISABLED] <- nid=10 [audio output]

+ <- nid=11 [audio output] (selected)

nid: 8

Name: audio output

Widget cap: 0x000062b1

DIGITAL UNSOL STRIPE(x4) FORMAT_OVR 8CH

Association: 0 (0x00000001)

OSS: pcm (pcm)

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

nid: 9

Name: audio output

Widget cap: 0x000062b1

DIGITAL UNSOL STRIPE(x4) FORMAT_OVR 8CH

Association: 1 (0x00000001)

OSS: pcm (pcm)

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

nid: 10

Name: audio output

Widget cap: 0x000062b1

DIGITAL UNSOL STRIPE(x4) FORMAT_OVR 8CH

Association: 2 (0x00000001)

OSS: pcm (pcm)

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

nid: 11

Name: audio output

Widget cap: 0x000062b1

DIGITAL UNSOL STRIPE(x4) FORMAT_OVR 8CH

Association: 3 (0x00000001)

OSS: pcm (pcm)

Stream cap: 0x00000005

AC3 PCM

PCM cap: 0x000e07f0

16 20 24 bits, 32 44 48 88 96 176 192 KHz

Found a device of class VoodooHDADevice: IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/P0P5@1C,1/IOPP/pci1102,12@0/VoodooHDADevice

Probing codec #1...

HDA Codec #1: Realtek ALC899

HDA Codec ID: 0x10ec0899

Vendor: 0x10ec

Device: 0x0899

Revision: 0x00

Stepping: 0x03

PCI Subvendor: 0x00101102

startNode=1 endNode=2

Found audio FG nid=1 startNode=2 endNode=39 total=37

Processing audio FG cad=1 nid=1...

Powering up...

Parsing audio FG...

GPIO: 0x40000002 NumGPIO=2 NumGPO=0 NumGPI=0 GPIWake=0 GPIUnsol=1

nid 17 0x40130000 as 0 seq 0 Speaker None ATAPI N/A External Unknown misc 0

nid 18 0x411111f0 as 15 seq 0 Speaker None 1/8 Rear External Black misc 0 NoPresenceDetect

nid 20 0x01014010 as 1 seq 0 Line-out Jack 1/8 Rear External Green misc 0

nid 21 0x01011012 as 1 seq 2 Line-out Jack 1/8 Rear External Black misc 0

nid 22 0x01016011 as 1 seq 1 Line-out Jack 1/8 Rear External Orange misc 0

nid 23 0x41012014 as 1 seq 4 Line-out None 1/8 Rear External Grey misc 0

nid 24 0x01a19040 as 4 seq 0 Microphone Jack 1/8 Rear External Pink misc 0

nid 25 0x02a19050 as 5 seq 0 Microphone Jack 1/8 Front External Pink misc 0

nid 26 0x01813060 as 6 seq 0 Line-in Jack 1/8 Rear External Blue misc 0

nid 27 0x0221401f as 1 seq 15 Headphones Jack 1/8 Front External Green misc 0

nid 28 0x411111f0 as 15 seq 0 Speaker None 1/8 Rear External Black misc 0 NoPresenceDetect

Patching widget caps nid=29 0x00400400 -> 0x00700400

nid 30 0x41441130 as 3 seq 0 SPDIF-out None RCA Rear External Black misc 0 NoPresenceDetect

nid 31 0x41c46170 as 7 seq 0 SPDIF-in None RCA Rear External Orange misc 0 NoPresenceDetect

Parsing vendor patch...

Nodes patching. Codec = 1

NumNodes = 2

VHDevice NID= 2 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID= 3 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID= 4 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID= 5 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID= 6 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID= 7 Config=00000000 (audio input ) Cap=00000000 Ctrl=00000000 -- Conns: 0=36

VHDevice NID= 8 Config=00000000 (audio input ) Cap=00000000 Ctrl=00000000 -- Conns: 0=35

VHDevice NID= 9 Config=00000000 (audio input ) Cap=00000000 Ctrl=00000000 -- Conns: 0=34

VHDevice NID=10 Config=00000000 (audio input ) Cap=00000000 Ctrl=00000000 -- Conns: 0=31

VHDevice NID=11 disabled for Realtek by user info.list

VHDevice NID=12 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=2 1=11

VHDevice NID=13 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=3 1=11

VHDevice NID=14 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=4 1=11

VHDevice NID=15 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=5 1=11

VHDevice NID=16 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=17 Config=40130000 (pin: Speaker () Cap=00000010 Ctrl=00000040 -- Conns: 0=16

VHDevice NID=18 Config=411111f0 (pin: Speaker () Cap=00000020 Ctrl=00000000 -- Conns:

VHDevice NID=19 Config=00000000 (vendor widget ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=20 Config=01014010 (pin: Line-out ) Cap=0001003c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=21 Config=01011012 (pin: Line-out ) Cap=0000003c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=22 Config=01016011 (pin: Line-out ) Cap=0000003c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=23 Config=41012014 (pin: Line-out ) Cap=0000003c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=24 Config=01a19040 (pin: Microphon) Cap=0000373c Ctrl=00000021 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=25 Config=02a19050 (pin: Microphon) Cap=0000373c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=26 Config=01813060 (pin: Line-in () Cap=0000373c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=27 Config=0221401f (pin: Headphone) Cap=0001373c Ctrl=00000020 -- Conns: 0=12 1=13 2=14 3=15 4=38

VHDevice NID=28 Config=411111f0 (pin: Speaker () Cap=00000024 Ctrl=00000020 -- Conns:

VHDevice NID=29 Config=00000000 (beep widget ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=30 Config=41441130 (pin: SPDIF-out) Cap=00000010 Ctrl=00000040 -- Conns: 0=6

VHDevice NID=31 Config=41c46170 (pin: SPDIF-in ) Cap=00000020 Ctrl=00000020 -- Conns:

VHDevice NID=32 Config=00000000 (vendor widget ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=33 Config=00000000 (vendor widget ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=34 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=24 1=25 2=26 3=27 4=28 5=29 6=20 7=21 8=22 9=23 10=11

VHDevice NID=35 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=24 1=25 2=26 3=27 4=28 5=29 6=20 7=21 8=22 9=23 10=11

VHDevice NID=36 Config=00000000 (audio selector) Cap=00000000 Ctrl=00000000 -- Conns: 0=24 1=25 2=26 3=27 4=28 5=29 6=20 7=21 8=22 9=23 10=11 11=18

VHDevice NID=37 Config=00000000 (audio output ) Cap=00000000 Ctrl=00000000 -- Conns:

VHDevice NID=38 Config=00000000 (audio mixer ) Cap=00000000 Ctrl=00000000 -- Conns: 0=37 1=11

Parsing Ctls...

Disabling nonaudio...

Disabling useless...

Disabling control 15 nid 23 cnid -1 due to disabled widget.

Disabling control 28 nid 34 cnid 28 due to disabled widget.

Disabling control 33 nid 34 cnid 23 due to disabled widget.

Disabling control 38 nid 35 cnid 28 due to disabled widget.

Disabling control 43 nid 35 cnid 23 due to disabled widget.

Disabling nid 10 connection 0 due to disabled child widget.

Disabling nid 12 connection 1 due to disabled child widget.

Disabling nid 13 connection 1 due to disabled child widget.

Disabling nid 14 connection 1 due to disabled child widget.

Disabling nid 15 connection 1 due to disabled child widget.

Disabling nid 34 connection 10 due to disabled child widget.

Disabling nid 35 connection 10 due to disabled child widget.

Disabling nid 36 connection 4 due to disabled child widget.

Disabling nid 36 connection 9 due to disabled child widget.

Disabling nid 36 connection 10 due to disabled child widget.

Disabling nid 36 connection 11 due to disabled child widget.

Disabling nid 38 connection 1 due to disabled child widget.

Patched pins configuration:

nid 17 0x40130000 as 0 seq 0 Speaker None ATAPI N/A External Unknown misc 0 [DISABLED]

nid 18 0x411111f0 as 15 seq 0 Speaker None 1/8 Rear External Black misc 0 NoPresenceDetect [DISABLED]

nid 20 0x01014010 as 1 seq 0 Line-out Jack 1/8 Rear External Green misc 0

nid 21 0x01011012 as 1 seq 2 Line-out Jack 1/8 Rear External Black misc 0

nid 22 0x01016011 as 1 seq 1 Line-out Jack 1/8 Rear External Orange misc 0

nid 23 0x41012014 as 1 seq 4 Line-out None 1/8 Rear External Grey misc 0 [DISABLED]

nid 24 0x01a19040 as 4 seq 0 Microphone Jack 1/8 Rear External Pink misc 0

nid 25 0x02a19050 as 5 seq 0 Microphone Jack 1/8 Front External Pink misc 0

nid 26 0x01813060 as 6 seq 0 Line-in Jack 1/8 Rear External Blue misc 0

nid 27 0x0221401f as 1 seq 15 Headphones Jack 1/8 Front External Green misc 0

nid 28 0x411111f0 as 15 seq 0 Speaker None 1/8 Rear External Black misc 0 NoPresenceDetect [DISABLED]

nid 30 0x41441130 as 3 seq 0 SPDIF-out None RCA Rear External Black misc 0 NoPresenceDetect [DISABLED]

nid 31 0x41c46170 as 7 seq 0 SPDIF-in None RCA Rear External Orange misc 0 NoPresenceDetect [DISABLED]

Parsing pin associations...

4 associations found:

Association 0 (1) out:

Pin nid=20 seq=0

Pin nid=22 seq=1

Pin nid=21 seq=2

Pin nid=27 seq=15

Redir type=0 jack=15 def=0

Association 1 (4) in:

Pin nid=24 seq=0

Redir type=-1 jack=0 def=0

Association 2 (5) in:

Pin nid=25 seq=0

Redir type=-1 jack=0 def=0

Association 3 (6) in:

Pin nid=26 seq=0

Redir type=-1 jack=0 def=0

Building AFG tree...

Tracing association 0 (1)

Tracing pin 20 with min nid 0

nid 2 returned 2

nid 12 returned 2

nid 3 returned 3

nid 13 returned 3

nid 4 returned 4

nid 14 returned 4

nid 5 returned 5

nid 15 returned 5

nid 37 returned 37

nid 38 returned 37

nid 20 returned 2

Pin 20 traced to DAC 2

Tracing pin 22 with min nid 0

nid 12 busy by seqmask 1

nid 3 returned 3

nid 13 returned 3

nid 4 returned 4

nid 14 returned 4

nid 5 returned 5

nid 15 returned 5

nid 37 returned 37

nid 38 returned 37

nid 22 returned 3

Pin 22 traced to DAC 3

Tracing pin 21 with min nid 0

nid 12 busy by seqmask 1

nid 13 busy by seqmask 2

nid 4 returned 4

nid 14 returned 4

nid 5 returned 5

nid 15 returned 5

nid 37 returned 37

nid 38 returned 37

nid 21 returned 4

Pin 21 traced to DAC 4

Tracing pin 27 with min nid 0 and hpredir 0

nid 2 returned 2

nid 12 returned 2

nid 27 returned 2

Pin 27 traced to DAC 2 and hpredir 0

Association 0 (1) trace succeeded

Tracing association 1 (4)

Tracing pin 24 to ADC 7

tracing via nid 24

tracing via nid 34

tracing via nid 9

nid 9 returned 0

nid 34 returned 0

tracing via nid 35

tracing via nid 8

nid 8 returned 0

nid 35 returned 0

tracing via nid 36

tracing via nid 7

nid 7 returned 1

nid 36 returned 1

nid 24 returned 1

Pin 24 traced to ADC 7

Association 1 (4) trace succeeded

Tracing association 2 (5)

Tracing pin 25 to ADC 8

tracing via nid 25

tracing via nid 34

tracing via nid 9

nid 9 returned 0

nid 34 returned 0

tracing via nid 35

tracing via nid 8

nid 8 returned 1

nid 35 returned 1

tracing via nid 36

nid 36 busy by association 1

nid 25 returned 1

Pin 25 traced to ADC 8

Association 2 (5) trace succeeded

Tracing association 3 (6)

Tracing pin 26 to ADC 9

tracing via nid 26

tracing via nid 34

tracing via nid 9

nid 9 returned 1

nid 34 returned 1

tracing via nid 35

nid 35 busy by association 2

tracing via nid 36

nid 36 busy by association 1

nid 26 returned 1

Pin 26 traced to ADC 9

Association 3 (6) trace succeeded

Tracing input monitor

Tracing nid mix 34 to out

tracing via nid 34

tracing via nid 9

nid 9 busy by input association 3

nid 34 returned 0

Tracing nid mix 35 to out

tracing via nid 35

tracing via nid 8

nid 8 busy by input association 2

nid 35 returned 0

Tracing other input monitors

Tracing nid complex 24 to out

tracing via nid 24

tracing via nid 34

nid 34 busy by input association 3

tracing via nid 35

nid 35 busy by input association 2

tracing via nid 36

nid 36 busy by input association 1

nid 24 returned 0

Tracing nid complex 25 to out

tracing via nid 25

tracing via nid 34

nid 34 busy by input association 3

tracing via nid 35

nid 35 busy by input association 2

tracing via nid 36

nid 36 busy by input association 1

nid 25 returned 0

Tracing nid complex 26 to out

tracing via nid 26

tracing via nid 34

nid 34 busy by input association 3

tracing via nid 35

nid 35 busy by input association 2

tracing via nid 36

nid 36 busy by input association 1

nid 26 returned 0

Tracing beeper

Tracing nid 29 to out

tracing via nid 29

tracing via nid 34

nid 34 busy by input association 3

tracing via nid 35

nid 35 busy by input association 2

tracing via nid 36

nid 36 busy by input association 1

nid 29 returned 0

Disabling unassociated widgets...

Disabling nonselected inputs...

Disabling useless...

Disabling control 10 nid 15 cnid -1 due to disabled widget.

Disabling control 11 nid 15 cnid 5 due to disabled widget.

Disabling control 44 nid 38 cnid -1 due to disabled widget.

Disabling control 45 nid 38 cnid 37 due to disabled widget.

Disabling crossassociated connections...

Disabling useless...

Binding associations to channels...

Assigning names to signal sources...

Assigning mixers to the tree...

Preparing pin controls...

AFG commit...

Creating PCM devices...

pcmAttach: HDA Realtek ALC899 PCM #0 Analog at cad 1 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Playback:

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

DAC: 2 3 4

Record:

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

ADC: 7

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Playback:

nid=20 [pin: Line-out (Green Rear)]

+ <- nid=12 [audio mixer] [src: mix] bindSeq=00008001

+ <- nid=2 [audio output] [src: pcm] bindSeq=00008001

nid=22 [pin: Line-out (Orange Rear)]

+ <- nid=13 [audio mixer] [src: mix] bindSeq=00000002

+ <- nid=3 [audio output] [src: pcm] bindSeq=00000002

nid=21 [pin: Line-out (Black Rear)]

+ <- nid=14 [audio mixer] [src: mix] bindSeq=00000004

+ <- nid=4 [audio output] [src: pcm] bindSeq=00000004

nid=27 [pin: Headphones (Green Front)]

+ <- nid=12 [audio mixer] [src: mix] bindSeq=00008001

+ <- nid=2 [audio output] [src: pcm] bindSeq=00008001

Record:

nid=7 [audio input]

+ <- nid=36 [audio selector] [src: speaker, mic] bindSeq=00000001

+ <- nid=24 [pin: Microphone (Pink Rear)] [src: mic] bindSeq=00000001

+ <- nid=29 [beep widget]

Input Mix:

nid=12 [audio mixer]

+ <- nid=2 [audio output] [src: pcm] bindSeq=00008001

nid=13 [audio mixer]

+ <- nid=3 [audio output] [src: pcm] bindSeq=00000002

nid=14 [audio mixer]

+ <- nid=4 [audio output] [src: pcm] bindSeq=00000004

nid=34 [audio mixer]

+ <- nid=26 [pin: Line-in (Blue Rear)] [src: line] bindSeq=00000001

+ <- nid=29 [beep widget]

nid=35 [audio mixer]

+ <- nid=25 [pin: Microphone (Pink Front)] [src: monitor] bindSeq=00000001

+ <- nid=29 [beep widget]

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

Master Volume (OSS: vol)

+- control 4 (nid 12 out): dir - out oss: vol, mix -65/+0dB (88 steps)

+- control 5 (nid 12 in 0): dir - out oss: vol, pcm mute

+- control 6 (nid 13 out): dir - out oss: vol, mix -65/+0dB (88 steps)

+- control 7 (nid 13 in 0): dir - out oss: vol, pcm mute

+- control 8 (nid 14 out): dir - out oss: vol, mix -65/+0dB (88 steps)

+- control 9 (nid 14 in 0): dir - out oss: vol, pcm mute

+- control 12 (nid 20 out): dir - out oss: vol, mix mute

+- control 13 (nid 21 out): dir - out oss: vol, mix mute

+- control 14 (nid 22 out): dir - out oss: vol, mix mute

+- control 22 (nid 27 out): dir - out oss: vol, mix mute

PCM Volume (OSS: pcm)

+- control 5 (nid 12 in 0): dir - out oss: vol, pcm mute

+- control 7 (nid 13 in 0): dir - out oss: vol, pcm mute

+- control 9 (nid 14 in 0): dir - out oss: vol, pcm mute

Microphone Volume (OSS: mic)

+- control 17 (nid 24 in 0): dir - in oss: mic +0/+30dB (4 steps)

Recording Level (OSS: rec)

+- control 1 (nid 7 in 0): dir - in oss: rec -17/+30dB (64 steps) + mute

Input Mix Level (OSS: mix)

+- control 4 (nid 12 out): dir - out oss: vol, mix -65/+0dB (88 steps)

+- control 6 (nid 13 out): dir - out oss: vol, mix -65/+0dB (88 steps)

+- control 8 (nid 14 out): dir - out oss: vol, mix -65/+0dB (88 steps)

+- control 12 (nid 20 out): dir - out oss: vol, mix mute

+- control 13 (nid 21 out): dir - out oss: vol, mix mute

+- control 14 (nid 22 out): dir - out oss: vol, mix mute

+- control 22 (nid 27 out): dir - out oss: vol, mix mute

OSS mixer initialization...

Recsel (line, mic, cd, monitor): nid 36 source 0 select

Registering PCM channels...

pcmAttach: HDA Realtek ALC899 PCM #1 Analog at cad 1 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Record:

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

ADC: 8

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Record:

nid=8 [audio input]

+ <- nid=35 [audio mixer] [src: mix] bindSeq=00000001

+ <- nid=25 [pin: Microphone (Pink Front)] [src: monitor] bindSeq=00000001

+ <- nid=29 [beep widget]

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

Microphone2 Volume (OSS: monitor)

+- control 19 (nid 25 in 0): dir - in oss: monitor +0/+30dB (4 steps)

+- control 35 (nid 35 in 1): dir - in oss: rec, monitor mute

Speaker/Beep Volume (OSS: speaker)

+- control 39 (nid 35 in 5): dir - in oss: speaker, rec mute

Recording Level (OSS: rec)

+- control 2 (nid 8 in 0): dir - in oss: mix, rec -17/+30dB (64 steps) + mute

+- control 35 (nid 35 in 1): dir - in oss: rec, monitor mute

+- control 39 (nid 35 in 5): dir - in oss: speaker, rec mute

Input Mix Level (OSS: mix)

+- control 2 (nid 8 in 0): dir - in oss: mix, rec -17/+30dB (64 steps) + mute

OSS mixer initialization...

Registering PCM channels...

pcmAttach: HDA Realtek ALC899 PCM #2 Analog at cad 1 nid 1

+--------------------------------------+

| DUMPING PCM Playback/Record Channels |

+--------------------------------------+

Record:

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

ADC: 9

+-------------------------------+

| DUMPING Playback/Record Paths |

+-------------------------------+

Record:

nid=9 [audio input]

+ <- nid=34 [audio mixer] [src: mix] bindSeq=00000001

+ <- nid=26 [pin: Line-in (Blue Rear)] [src: line] bindSeq=00000001

+ <- nid=29 [beep widget]

+-------------------------+

| DUMPING Volume Controls |

+-------------------------+

Line-in Volume (OSS: line)

+- control 21 (nid 26 in 0): dir - in oss: line +0/+30dB (4 steps)

+- control 26 (nid 34 in 2): dir - in oss: line, rec mute

Speaker/Beep Volume (OSS: speaker)

+- control 29 (nid 34 in 5): dir - in oss: speaker, rec mute

Recording Level (OSS: rec)

+- control 3 (nid 9 in 0): dir - in oss: mix, rec -17/+30dB (64 steps) + mute

+- control 26 (nid 34 in 2): dir - in oss: line, rec mute

+- control 29 (nid 34 in 5): dir - in oss: speaker, rec mute

Input Mix Level (OSS: mix)

+- control 3 (nid 9 in 0): dir - in oss: mix, rec -17/+30dB (64 steps) + mute

OSS mixer initialization...

Registering PCM channels...

FG config/quirks: forcestereo ivref50 ivref80 ivref100 ivref

HP switch init...

+-------------------+

| DUMPING HDA NODES |

+-------------------+

Default Parameter

-----------------

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05f0

16 20 24 bits, 32 44 48 88 96 192 KHz

IN amp: 0x00000000

OUT amp: 0x00000000

nid: 2

Name: audio output

Widget cap: 0x00000411

PWR FORMAT_OVR STEREO

Association: 0 (0x00008001)

OSS: pcm (pcm)

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

nid: 3

Name: audio output

Widget cap: 0x00000411

PWR FORMAT_OVR STEREO

Association: 0 (0x00000002)

OSS: pcm (pcm)

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

nid: 4

Name: audio output

Widget cap: 0x00000411

PWR FORMAT_OVR STEREO

Association: 0 (0x00000004)

OSS: pcm (pcm)

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

nid: 5 [DISABLED]

Name: audio output

Widget cap: 0x00000411

PWR FORMAT_OVR STEREO

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

nid: 6 [DISABLED]

Name: audio output

Widget cap: 0x00000611

PWR DIGITAL FORMAT_OVR STEREO

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05f0

16 20 24 bits, 32 44 48 88 96 192 KHz

nid: 7

Name: audio input

Widget cap: 0x0010051b

PWR FORMAT_OVR AMP_OVR IN_AMP STEREO

Association: 1 (0x00000001)

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

Input amp: 0x80023f17

mute=1 step=63 size=2 offset=23

Input val: [0x39 0x39]

connections: 1 enabled 1

+ <- nid=36 [audio selector]

nid: 8

Name: audio input

Widget cap: 0x0010051b

PWR FORMAT_OVR AMP_OVR IN_AMP STEREO

Association: 2 (0x00000001)

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

Input amp: 0x80023f17

mute=1 step=63 size=2 offset=23

Input val: [0x33 0x33]

connections: 1 enabled 1

+ <- nid=35 [audio mixer]

nid: 9

Name: audio input

Widget cap: 0x0010051b

PWR FORMAT_OVR AMP_OVR IN_AMP STEREO

Association: 3 (0x00000001)

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

Input amp: 0x80023f17

mute=1 step=63 size=2 offset=23

Input val: [0x33 0x33]

connections: 1 enabled 1

+ <- nid=34 [audio mixer]

nid: 10 [DISABLED]

Name: audio input

Widget cap: 0x00100791

PWR DIGITAL UNSOL FORMAT_OVR STEREO

Stream cap: 0x00000001

PCM

PCM cap: 0x000e0570

16 20 24 bits, 32 44 48 96 192 KHz

connections: 1 enabled 0

+ [DISABLED] <- nid=31 [pin: SPDIF-in (None)] [DISABLED]

nid: 11 [DISABLED]

Name: audio mixer

Widget cap: 0x0020010b

AMP_OVR IN_AMP STEREO

Input amp: 0x80051f17

mute=1 step=31 size=5 offset=23

Input val: [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97] [0x97 0x97]

connections: 10 enabled 10

+ <- nid=24 [pin: Microphone (Pink Rear)]

+ <- nid=25 [pin: Microphone (Pink Front)]

+ <- nid=26 [pin: Line-in (Blue Rear)]

+ <- nid=27 [pin: Headphones (Green Front)]

+ <- nid=28 [pin: Speaker (None)] [DISABLED]

+ <- nid=29 [beep widget]

+ <- nid=20 [pin: Line-out (Green Rear)]

+ <- nid=21 [pin: Line-out (Black Rear)]

+ <- nid=22 [pin: Line-out (Orange Rear)]

+ <- nid=23 [pin: Line-out (None)] [DISABLED]

nid: 12

Name: audio mixer

Widget cap: 0x0020010f

AMP_OVR OUT_AMP IN_AMP STEREO

Association: 0 (0x00008001)

OSS: mix (mix)

Output amp: 0x00025757

mute=0 step=87 size=2 offset=87

Output val: [0x3F 0x3F]

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x00 0x00] [0x80 0x80]

connections: 2 enabled 1

+ <- nid=2 [audio output]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

nid: 13

Name: audio mixer

Widget cap: 0x0020010f

AMP_OVR OUT_AMP IN_AMP STEREO

Association: 0 (0x00000002)

OSS: mix (mix)

Output amp: 0x00025757

mute=0 step=87 size=2 offset=87

Output val: [0x3F 0x3F]

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x00 0x00] [0x80 0x80]

connections: 2 enabled 1

+ <- nid=3 [audio output]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

nid: 14

Name: audio mixer

Widget cap: 0x0020010f

AMP_OVR OUT_AMP IN_AMP STEREO

Association: 0 (0x00000004)

OSS: mix (mix)

Output amp: 0x00025757

mute=0 step=87 size=2 offset=87

Output val: [0x3F 0x3F]

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x00 0x00] [0x80 0x80]

connections: 2 enabled 1

+ <- nid=4 [audio output]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

nid: 15 [DISABLED]

Name: audio mixer

Widget cap: 0x0020010f

AMP_OVR OUT_AMP IN_AMP STEREO

Output amp: 0x00025757

mute=0 step=87 size=2 offset=87

Output val: [0x00 0x00]

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x80 0x80] [0x80 0x80]

connections: 2 enabled 1

+ <- nid=5 [audio output] [DISABLED]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

nid: 16 [DISABLED]

Name: audio output

Widget cap: 0x00000611

PWR DIGITAL FORMAT_OVR STEREO

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05f0

16 20 24 bits, 32 44 48 88 96 192 KHz

nid: 17 [DISABLED]

Name: pin: Speaker (None)

Widget cap: 0x00400701

PWR DIGITAL STEREO

Pin cap: 0x00000010

OUT

Pin config: 0x40130000

Pin control: 0x00000000

connections: 1 enabled 1

+ <- nid=16 [audio output] [DISABLED]

nid: 18 [DISABLED]

Name: pin: Speaker (None)

Widget cap: 0x00400401

PWR STEREO

Pin cap: 0x00000020

IN

Pin config: 0x411111f0

Pin control: 0x00000000

nid: 19 [DISABLED]

Name: vendor widget

Widget cap: 0x00f00000

nid: 20

Name: pin: Line-out (Green Rear)

Widget cap: 0x0040058d

PWR UNSOL AMP_OVR OUT_AMP STEREO

Association: 0 (0x00000001)

Pin cap: 0x0001003c

PDC HP OUT IN EAPD

Pin config: 0x01014010

Pin control: 0x00000040 OUT

EAPD: 0x00000002

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x00 0x00]

connections: 5 enabled 1

+ <- nid=12 [audio mixer] (selected)

+ [DISABLED] <- nid=13 [audio mixer]

+ [DISABLED] <- nid=14 [audio mixer]

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 21

Name: pin: Line-out (Black Rear)

Widget cap: 0x0040058d

PWR UNSOL AMP_OVR OUT_AMP STEREO

Association: 0 (0x00000004)

Pin cap: 0x0000003c

PDC HP OUT IN

Pin config: 0x01011012

Pin control: 0x00000040 OUT

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x00 0x00]

connections: 5 enabled 1

+ [DISABLED] <- nid=12 [audio mixer]

+ [DISABLED] <- nid=13 [audio mixer]

+ <- nid=14 [audio mixer] (selected)

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 22

Name: pin: Line-out (Orange Rear)

Widget cap: 0x0040058d

PWR UNSOL AMP_OVR OUT_AMP STEREO

Association: 0 (0x00000002)

Pin cap: 0x0000003c

PDC HP OUT IN

Pin config: 0x01016011

Pin control: 0x00000040 OUT

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x00 0x00]

connections: 5 enabled 1

+ [DISABLED] <- nid=12 [audio mixer]

+ <- nid=13 [audio mixer] (selected)

+ [DISABLED] <- nid=14 [audio mixer]

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 23 [DISABLED]

Name: pin: Line-out (None)

Widget cap: 0x0040058d

PWR UNSOL AMP_OVR OUT_AMP STEREO

Pin cap: 0x0000003c

PDC HP OUT IN

Pin config: 0x41012014

Pin control: 0x00000000

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x80 0x80]

connections: 5 enabled 5

+ <- nid=12 [audio mixer] (selected)

+ <- nid=13 [audio mixer]

+ <- nid=14 [audio mixer]

+ <- nid=15 [audio mixer] [DISABLED]

+ <- nid=38 [audio mixer] [DISABLED]

nid: 24

Name: pin: Microphone (Pink Rear)

Widget cap: 0x0040058f

PWR UNSOL AMP_OVR OUT_AMP IN_AMP STEREO

Association: 1 (0x00000001)

OSS: mic (mic)

Pin cap: 0x0000373c

PDC HP OUT IN VREF[ 50 80 100 GROUND HIZ ]

Pin config: 0x01a19040

Pin control: 0x00000025 IN VREFs

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x80 0x80]

Input amp: 0x00270300

mute=0 step=3 size=39 offset=0

Input val: [0x02 0x02]

connections: 5 enabled 0

+ [DISABLED] <- nid=12 [audio mixer] (selected)

+ [DISABLED] <- nid=13 [audio mixer]

+ [DISABLED] <- nid=14 [audio mixer]

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 25

Name: pin: Microphone (Pink Front)

Widget cap: 0x0040058f

PWR UNSOL AMP_OVR OUT_AMP IN_AMP STEREO

Association: 2 (0x00000001)

OSS: monitor (monitor)

Pin cap: 0x0000373c

PDC HP OUT IN VREF[ 50 80 100 GROUND HIZ ]

Pin config: 0x02a19050

Pin control: 0x00000025 IN VREFs

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x80 0x80]

Input amp: 0x00270300

mute=0 step=3 size=39 offset=0

Input val: [0x02 0x02]

connections: 5 enabled 0

+ [DISABLED] <- nid=12 [audio mixer] (selected)

+ [DISABLED] <- nid=13 [audio mixer]

+ [DISABLED] <- nid=14 [audio mixer]

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 26

Name: pin: Line-in (Blue Rear)

Widget cap: 0x0040058f

PWR UNSOL AMP_OVR OUT_AMP IN_AMP STEREO

Association: 3 (0x00000001)

OSS: line (line)

Pin cap: 0x0000373c

PDC HP OUT IN VREF[ 50 80 100 GROUND HIZ ]

Pin config: 0x01813060

Pin control: 0x00000025 IN VREFs

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x80 0x80]

Input amp: 0x00270300

mute=0 step=3 size=39 offset=0

Input val: [0x02 0x02]

connections: 5 enabled 0

+ [DISABLED] <- nid=12 [audio mixer] (selected)

+ [DISABLED] <- nid=13 [audio mixer]

+ [DISABLED] <- nid=14 [audio mixer]

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 27

Name: pin: Headphones (Green Front)

Widget cap: 0x0040058f

PWR UNSOL AMP_OVR OUT_AMP IN_AMP STEREO

Association: 0 (0x00008000)

Pin cap: 0x0001373c

PDC HP OUT IN VREF[ 50 80 100 GROUND HIZ ] EAPD

Pin config: 0x0221401f

Pin control: 0x000000c0 HP OUT

EAPD: 0x00000002

Output amp: 0x80000000

mute=1 step=0 size=0 offset=0

Output val: [0x00 0x00]

Input amp: 0x00270300

mute=0 step=3 size=39 offset=0

Input val: [0x00 0x00]

connections: 5 enabled 1

+ <- nid=12 [audio mixer] (selected)

+ [DISABLED] <- nid=13 [audio mixer]

+ [DISABLED] <- nid=14 [audio mixer]

+ [DISABLED] <- nid=15 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=38 [audio mixer] [DISABLED]

nid: 28 [DISABLED]

Name: pin: Speaker (None)

Widget cap: 0x00400481

PWR UNSOL STEREO

Pin cap: 0x00000024

PDC IN

Pin config: 0x411111f0

Pin control: 0x00000000

nid: 29

Name: beep widget

Widget cap: 0x00700400

PWR

Association: -2 (0x00000000)

OSS: speaker (speaker)

nid: 30 [DISABLED]

Name: pin: SPDIF-out (None)

Widget cap: 0x00400701

PWR DIGITAL STEREO

Pin cap: 0x00000010

OUT

Pin config: 0x41441130

Pin control: 0x00000000

connections: 1 enabled 1

+ <- nid=6 [audio output] [DISABLED]

nid: 31 [DISABLED]

Name: pin: SPDIF-in (None)

Widget cap: 0x00400681

PWR DIGITAL UNSOL STEREO

Pin cap: 0x00000020

IN

Pin config: 0x41c46170

Pin control: 0x00000000

nid: 32 [DISABLED]

Name: vendor widget

Widget cap: 0x00f00040

PROC

nid: 33 [DISABLED]

Name: vendor widget

Widget cap: 0x00f00000

nid: 34

Name: audio mixer

Widget cap: 0x0020010b

AMP_OVR IN_AMP STEREO

Association: 3 (0x00000001)

OSS: mix (mix)

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x80 0x80] [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80]

connections: 11 enabled 2

+ [DISABLED] <- nid=24 [pin: Microphone (Pink Rear)]

+ [DISABLED] <- nid=25 [pin: Microphone (Pink Front)]

+ <- nid=26 [pin: Line-in (Blue Rear)]

+ [DISABLED] <- nid=27 [pin: Headphones (Green Front)]

+ [DISABLED] <- nid=28 [pin: Speaker (None)] [DISABLED]

+ <- nid=29 [beep widget]

+ [DISABLED] <- nid=20 [pin: Line-out (Green Rear)]

+ [DISABLED] <- nid=21 [pin: Line-out (Black Rear)]

+ [DISABLED] <- nid=22 [pin: Line-out (Orange Rear)]

+ [DISABLED] <- nid=23 [pin: Line-out (None)] [DISABLED]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

nid: 35

Name: audio mixer

Widget cap: 0x0020010b

AMP_OVR IN_AMP STEREO

Association: 2 (0x00000001)

OSS: mix (mix)

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x00 0x00] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80] [0x80 0x80]

connections: 11 enabled 2

+ [DISABLED] <- nid=24 [pin: Microphone (Pink Rear)]

+ <- nid=25 [pin: Microphone (Pink Front)]

+ [DISABLED] <- nid=26 [pin: Line-in (Blue Rear)]

+ [DISABLED] <- nid=27 [pin: Headphones (Green Front)]

+ [DISABLED] <- nid=28 [pin: Speaker (None)] [DISABLED]

+ <- nid=29 [beep widget]

+ [DISABLED] <- nid=20 [pin: Line-out (Green Rear)]

+ [DISABLED] <- nid=21 [pin: Line-out (Black Rear)]

+ [DISABLED] <- nid=22 [pin: Line-out (Orange Rear)]

+ [DISABLED] <- nid=23 [pin: Line-out (None)] [DISABLED]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

nid: 36

Name: audio selector

Widget cap: 0x00300101

STEREO

Association: 1 (0x00000001)

OSS: speaker, mic

connections: 12 enabled 2

+ <- nid=24 [pin: Microphone (Pink Rear)] (selected)

+ [DISABLED] <- nid=25 [pin: Microphone (Pink Front)]

+ [DISABLED] <- nid=26 [pin: Line-in (Blue Rear)]

+ [DISABLED] <- nid=27 [pin: Headphones (Green Front)]

+ [DISABLED] <- nid=28 [pin: Speaker (None)] [DISABLED]

+ <- nid=29 [beep widget]

+ [DISABLED] <- nid=20 [pin: Line-out (Green Rear)]

+ [DISABLED] <- nid=21 [pin: Line-out (Black Rear)]

+ [DISABLED] <- nid=22 [pin: Line-out (Orange Rear)]

+ [DISABLED] <- nid=23 [pin: Line-out (None)] [DISABLED]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

+ [DISABLED] <- nid=18 [pin: Speaker (None)] [DISABLED]

nid: 37 [DISABLED]

Name: audio output

Widget cap: 0x00000411

PWR FORMAT_OVR STEREO

Stream cap: 0x00000001

PCM

PCM cap: 0x000e05e0

16 20 24 bits, 44 48 88 96 192 KHz

nid: 38 [DISABLED]

Name: audio mixer

Widget cap: 0x0020010f

AMP_OVR OUT_AMP IN_AMP STEREO

Output amp: 0x00025757

mute=0 step=87 size=2 offset=87

Output val: [0x00 0x00]

Input amp: 0x80000000

mute=1 step=0 size=0 offset=0

Input val: [0x80 0x80] [0x80 0x80]

connections: 2 enabled 1

+ <- nid=37 [audio output] [DISABLED]

+ [DISABLED] <- nid=11 [audio mixer] [DISABLED]

### I/O Kit Registry

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### LSPCI

- lspci (nnvv)
- lspci detailed (nnvvbxxxx)
- lspci map (M)
- lspci tree (nnvvt)

Numbers & names view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci (nnvv).txt

00:00.0 Host bridge [0600]: Intel Corporation 4 Series Chipset DRAM Controller [8086:2e20] (rev 02)

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d3]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR+ INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00:06.0 PCI bridge [0604]: Intel Corporation 4 Series Chipset PCI Express Root Port [8086:2e29] (rev 02) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

I/O behind bridge: 0000a000-0000afff

Memory behind bridge: f8000000-f90fffff

Prefetchable memory behind bridge: 0000000f80000000-0000000f89ffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [88] Subsystem: Intel Corporation Device [8086:0000]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #3, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <1us, L1 <4us

ClockPM- Surprise- LLActRep- BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #2, PowerLimit 25.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00:1a.0 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 [8086:3a37] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 4: I/O ports at 9800

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00:1a.1 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 [8086:3a38] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 21

Region 4: I/O ports at 9880

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00:1a.2 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 [8086:3a39] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin C routed to IRQ 18

Region 4: I/O ports at 9c00

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00:1a.7 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 [8086:3a3c] (prog-if 20 [EHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin C routed to IRQ 18

Region 0: Memory at f7fffc00 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] Vendor Specific Information: Len=06 <?>

00:1c.0 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1 [8086:3a40] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=06, subordinate=06, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1c.1 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 2 [8086:3a42] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=05, subordinate=05, sec-latency=0

Memory behind bridge: f9f00000-f9ffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1c.2 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 3 [8086:3a44] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=04, subordinate=04, sec-latency=0

I/O behind bridge: 0000d000-0000dfff

Memory behind bridge: f9e00000-f9efffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1c.3 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 4 [8086:3a46] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=03, subordinate=03, sec-latency=0

I/O behind bridge: 0000c000-0000cfff

Memory behind bridge: f9d00000-f9dfffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1c.4 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 5 [8086:3a48] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=02, subordinate=02, sec-latency=0

I/O behind bridge: 0000b000-0000bfff

Memory behind bridge: f9c00000-f9cfffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1d.0 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 [8086:3a34] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 23

Region 4: I/O ports at 9080

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00:1d.1 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 [8086:3a35] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 19

Region 4: I/O ports at 9400

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00:1d.2 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 [8086:3a36] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin C routed to IRQ 18

Region 4: I/O ports at 9480

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00:1d.7 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 [8086:3a3a] (prog-if 20 [EHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 23

Region 0: Memory at f7fff800 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] Vendor Specific Information: Len=06 <?>

00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev 90) (prog-if 01 [Subtractive decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=07, subordinate=07, sec-latency=64

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: fa000000-fe0fffff

Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR+

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [50] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

00:1f.0 ISA bridge [0601]: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller [8086:3a16]

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00:1f.2 SATA controller [0106]: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller [8086:3a22] (prog-if 01 [AHCI 1.0])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 19

Region 0: I/O ports at 8c00

Region 1: I/O ports at 8880

Region 2: I/O ports at 8800

Region 3: I/O ports at 8480

Region 4: I/O ports at 8400

Region 5: Memory at f7ffe800 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable- Count=1/16 Maskable- 64bit-

Address: fee00000 Data: 4070

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

Capabilities: [b0] Vendor Specific Information: Len=06 <?>

00:1f.3 SMBus [0c05]: Intel Corporation 82801JI (ICH10 Family) SMBus Controller [8086:3a30]

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at f8a000000 (64-bit, non-prefetchable)

Region 4: I/O ports at 0400

01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GK104 [GeForce GTX 670] [10de:1189] (rev a1) (prog-if 00 [VGA controller])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:2842]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at f8000000 (32-bit, non-prefetchable)

Region 1: Memory at f80000000 (64-bit, prefetchable)

Region 3: Memory at f88000000 (64-bit, prefetchable)

Region 5: I/O ports at ac00

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4071

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #1, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b4] Vendor Specific Information: Len=14 <?>

01:00.1 Audio device [0403]: NVIDIA Corporation GK104 HDMI Audio Controller [10de:0e0a] (rev a1)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:2842]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin B routed to IRQ 17

Region 0: Memory at f9080000 (32-bit, non-prefetchable)

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4072

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #1, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

02:00.0 IDE interface [0101]: Marvell Technology Group Ltd. 88SE6111/6121 SATA II / PATA Controller [11ab:6121] (rev b1) (prog-if 8f [PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering])

Subsystem: Marvell Technology Group Ltd. 88SE6111/6121 1/2 port SATA II + 1 port PATA Controller [11ab:6121]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: I/O ports at bc00

Region 1: I/O ports at b880

Region 2: I/O ports at b800

Region 3: I/O ports at b480

Region 4: I/O ports at b400

Region 5: Memory at f9cffc00 (32-bit, non-prefetchable)

Capabilities: [48] Power Management version 2

Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4073

Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited

ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr+ NoSnoop-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <256ns, L1 unlimited

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

03:00.0 Ethernet controller [0200]: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364] (rev 12)

Subsystem: ASUSTeK Computer Inc. Motherboard [1043:81f8]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 19

Region 0: Memory at f9dfc000 (64-bit, non-prefetchable)

Region 2: I/O ports at c800 [disabled]

Expansion ROM at f9dc0000 [disabled]

Capabilities: [48] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [50] Vital Product Data

Not readable

Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4074

Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 2048 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 unlimited

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

04:00.0 Ethernet controller [0200]: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364] (rev 12)

Subsystem: ASUSTeK Computer Inc. Motherboard [1043:81f8]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 18

Region 0: Memory at f9efc000 (64-bit, non-prefetchable)

Region 2: I/O ports at d800 [disabled]

Expansion ROM at f9ec0000 [disabled]

Capabilities: [48] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [50] Vital Product Data

Not readable

Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4076

Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 2048 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 unlimited

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

05:00.0 Audio device [0403]: Creative Labs Sound Core3D [Sound Blaster Recon3D / Z-Series] [1102:0012] (rev 01)

Subsystem: Creative Labs SB1570 SB Audigy Fx [1102:0010]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 17

Region 0: Memory at f9ffc000 (64-bit, non-prefetchable)

Region 2: Memory at f9ff8000 (64-bit, non-prefetchable)

Capabilities: [40] Power Management version 3

Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [50] MSI: Enable+ Count=1/1 Maskable+ 64bit+

Address: 00000000fee00000 Data: 4075

Masking: 00000000 Pending: 00000000

Capabilities: [70] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <16us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

07:00.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [14f1:8800] (rev 05)

Subsystem: Hauppauge computer works Inc. Nova-S-Plus DVB-S [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (5000ns min, 13750ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fa000000 (32-bit, non-prefetchable)

Capabilities: [44] Vital Product Data

Not readable

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

07:00.1 Multimedia controller [0480]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port] [14f1:8801] (rev 05)

Subsystem: Hauppauge computer works Inc. Device [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (1000ns min, 63750ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fb000000 (32-bit, non-prefetchable)

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

07:00.2 Multimedia controller [0480]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port] [14f1:8802] (rev 05)

Subsystem: Hauppauge computer works Inc. Device [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (1500ns min, 22000ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fc000000 (32-bit, non-prefetchable)

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

07:00.4 Multimedia controller [0480]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [IR Port] [14f1:8804] (rev 05)

Subsystem: Hauppauge computer works Inc. Device [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (1500ns min, 63750ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fd000000 (32-bit, non-prefetchable)

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

07:03.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller [1106:3044] (rev c0) (prog-if 10 [OHCI])

Subsystem: ASUSTeK Computer Inc. Motherboard [1043:81fe]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (8000ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 19

Region 0: Memory at fe000000 (32-bit, non-prefetchable)

Region 1: I/O ports at ec00 [disabled]

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Bus centric view - Extended hex dump. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci detailed (nnvvbxxxx).txt

00:00.0 Host bridge [0600]: Intel Corporation 4 Series Chipset DRAM Controller [8086:2e20] (rev 02)

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d3]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR+ INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00: 86 80 20 2e 06 00 90 a0 02 00 00 06 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 d3 82

30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

40: 01 90 d1 fe 00 00 00 00 01 40 d1 fe 00 00 00 00

50: 00 00 00 00 01 20 00 00 00 00 00 00 00 00 00 00

60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 10 11 11 00 00 33 33 00 80 00 8b 00 00 1a 38 00

a0: 80 00 00 23 00 00 00 d0 00 00 00 d0 00 00 00 d0

b0: 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 03 03 00 00 60 66 66 13 00 00 00 4b

e0: 09 00 0c 81 20 45 37 88 d2 4d 0b 80 00 00 00 00

f0: 00 00 00 00 00 00 00 00 a6 0f 02 00 00 00 00 00

00:06.0 PCI bridge [0604]: Intel Corporation 4 Series Chipset PCI Express Root Port [8086:2e29] (rev 02) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

I/O behind bridge: 0000a000-0000afff

Memory behind bridge: f8000000-f90fffff

Prefetchable memory behind bridge: 0000000f80000000-0000000f89ffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [88] Subsystem: Intel Corporation Device [8086:0000]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #3, Speed 5GT/s, Width x8, ASPM L0s L1, Latency L0 <1us, L1 <4us

ClockPM- Surprise- LLActRep- BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #2, PowerLimit 25.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: 86 80 29 2e 07 01 10 00 02 00 04 06 08 00 01 00

10: 00 00 00 00 00 00 00 00 00 01 01 00 a0 a0 00 20

20: 00 f8 00 f9 01 80 f1 89 0f 00 00 00 0f 00 00 00

30: 00 00 00 00 88 00 00 00 00 00 00 00 10 01 1a 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02

80: 01 90 03 c8 08 00 00 00 0d 80 00 00 86 80 00 00

90: 05 a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 10 00 42 01 00 80 00 00 00 00 00 00 82 4c 21 03

b0: 00 00 81 50 80 0c 14 00 00 00 48 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 01 00 03 e1 3f 80 90 0f 02 00 00 00 00 00

00:1a.0 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 [8086:3a37] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 4: I/O ports at 9800

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00: 86 80 37 3a 05 00 90 02 00 00 03 0c 00 00 80 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 01 98 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 20 00 00 00 00 00 00 00 00 01 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1a.1 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 [8086:3a38] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 21

Region 4: I/O ports at 9880

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00: 86 80 38 3a 05 00 90 02 00 00 03 0c 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 81 98 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 15 02 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 20 00 00 00 00 00 00 00 00 01 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1a.2 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 [8086:3a39] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin C routed to IRQ 18

Region 4: I/O ports at 9c00

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00: 86 80 39 3a 05 00 90 02 00 00 03 0c 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 01 9c 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 12 03 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 20 00 00 00 00 00 00 00 00 01 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1a.7 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 [8086:3a3c] (prog-if 20 [EHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin C routed to IRQ 18

Region 0: Memory at f7fffc00 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] Vendor Specific Information: Len=06 <?>

00: 86 80 3c 3a 06 00 90 02 00 20 03 0c 00 00 00 00

10: 00 fc ff f7 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 12 03 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00

60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 20 00 c0

70: 00 00 df 0f 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 09 00 06 20 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 86 85 40 00 86 0f 00 00 0a 13 02 20

00:1c.0 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1 [8086:3a40] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=06, subordinate=06, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 40 3a 07 01 10 00 00 00 04 06 08 00 81 00

10: 00 00 00 00 00 00 00 00 00 06 06 00 f0 00 00 20

20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 11 01 02 00

40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 01

50: 40 00 01 10 60 05 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 43 10 d4 82 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00

e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1c.1 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 2 [8086:3a42] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=05, subordinate=05, sec-latency=0

Memory behind bridge: f9f00000-f9ffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 42 3a 07 01 10 00 00 00 04 06 08 00 81 00

10: 00 00 00 00 00 00 00 00 00 05 05 00 f0 00 00 20

20: f0 f9 f0 f9 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 02 02 00

40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 02

50: 40 00 11 30 60 05 00 00 00 00 48 01 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 43 10 d4 82 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00

e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1c.2 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 3 [8086:3a44] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=04, subordinate=04, sec-latency=0

I/O behind bridge: 0000d000-0000dfff

Memory behind bridge: f9e00000-f9efffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 44 3a 07 01 10 00 00 00 04 06 08 00 81 00

10: 00 00 00 00 00 00 00 00 00 04 04 00 d0 d0 00 00

20: e0 f9 e0 f9 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 12 03 02 00

40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 03

50: 40 00 11 30 60 05 00 00 00 00 40 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 43 10 d4 82 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00

e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1c.3 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 4 [8086:3a46] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=03, subordinate=03, sec-latency=0

I/O behind bridge: 0000c000-0000cfff

Memory behind bridge: f9d00000-f9dfffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 46 3a 07 01 10 00 00 00 04 06 08 00 81 00

10: 00 00 00 00 00 00 00 00 00 03 03 00 c0 c0 00 00

20: d0 f9 d0 f9 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 13 04 02 00

40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 04

50: 40 00 11 30 60 05 00 00 00 00 40 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 43 10 d4 82 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00

e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1c.4 PCI bridge [0604]: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 5 [8086:3a48] (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Bus: primary=00, secondary=02, subordinate=02, sec-latency=0

I/O behind bridge: 0000b000-0000bfff

Memory behind bridge: f9c00000-f9cfffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #5, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 10.000W; Interlock- NoCompl-

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 48 3a 07 01 10 00 00 00 04 06 08 00 81 00

10: 00 00 00 00 00 00 00 00 00 02 02 00 b0 b0 00 20

20: c0 f9 c0 f9 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 11 01 02 00

40: 10 80 41 01 00 80 00 00 00 00 10 00 11 2c 11 05

50: 40 00 11 30 60 05 00 00 00 00 48 01 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 43 10 d4 82 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 11 08 00 00 00 00

e0: 00 00 c7 00 06 07 08 00 30 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1d.0 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 [8086:3a34] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 23

Region 4: I/O ports at 9080

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00: 86 80 34 3a 05 00 90 02 00 00 03 0c 00 00 80 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 81 90 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 17 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 20 00 00 00 00 00 00 00 00 01 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1d.1 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 [8086:3a35] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 19

Region 4: I/O ports at 9400

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00: 86 80 35 3a 05 00 90 02 00 00 03 0c 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 01 94 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 13 02 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 20 00 00 00 00 00 00 00 00 01 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1d.2 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 [8086:3a36] (prog-if 00 [UHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin C routed to IRQ 18

Region 4: I/O ports at 9480

Capabilities: [50] Vendor Specific Information: Len=06 <?>

00: 86 80 36 3a 05 00 90 02 00 00 03 0c 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 81 94 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 12 03 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 20 00 00 00 00 00 00 00 00 01 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1d.7 USB controller [0c03]: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 [8086:3a3a] (prog-if 20 [EHCI])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 23

Region 0: Memory at f7fff800 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] Vendor Specific Information: Len=06 <?>

00: 86 80 3a 3a 06 00 90 02 00 20 03 0c 00 00 00 00

10: 00 f8 ff f7 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 50 00 00 00 00 00 00 00 17 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00

60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 20 00 c0

70: 00 00 df 0f 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 09 00 06 20 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 86 85 40 00 86 0f 00 00 0a 13 02 20

00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev 90) (prog-if 01 [Subtractive decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=07, subordinate=07, sec-latency=64

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: fa000000-fe0fffff

Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR+

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [50] Subsystem: ASUSTeK Computer Inc. Device [1043:82d4]

00: 86 80 4e 24 07 01 10 00 90 01 04 06 00 00 01 00

10: 00 00 00 00 00 00 00 00 00 07 07 40 e0 e0 80 a2

20: 00 fa 00 fe f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 02 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00

50: 0d 00 00 00 43 10 d4 82 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1f.0 ISA bridge [0601]: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller [8086:3a16]

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00: 86 80 16 3a 07 00 10 02 00 00 01 06 00 00 80 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

40: 01 08 00 00 80 00 00 00 01 05 00 00 10 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 0a 0b 0f 05 d0 00 00 00 80 0e 80 03 f8 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 0f 14 95 02 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: a0 06 00 00 39 02 01 00 13 1c 0a 24 00 03 00 00

b0: 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 33 22 11 00 67 45 00 00 c0 f0 00 00 00 00 00 00

e0: 09 00 0c 10 01 00 c4 02 64 02 00 00 00 00 00 00

f0: 01 c0 d1 fe 00 00 00 00 86 0f 00 00 00 00 00 00

00:1f.2 SATA controller [0106]: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller [8086:3a22] (prog-if 01 [AHCI 1.0])

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 19

Region 0: I/O ports at 8c00

Region 1: I/O ports at 8880

Region 2: I/O ports at 8800

Region 3: I/O ports at 8480

Region 4: I/O ports at 8400

Region 5: Memory at f7ffe800 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable- Count=1/16 Maskable- 64bit-

Address: fee00000 Data: 4070

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

Capabilities: [b0] Vendor Specific Information: Len=06 <?>

00: 86 80 22 3a 07 00 b0 02 00 01 06 01 00 00 00 00

10: 01 8c 00 00 81 88 00 00 01 88 00 00 81 84 00 00

20: 01 84 00 00 00 e8 ff f7 00 00 00 00 43 10 d4 82

30: 00 00 00 00 80 00 00 00 00 00 00 00 13 02 00 00

40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 70 08 00 00 00 e0 fe 70 40 00 00 00 00 00 00

90: 60 00 3f 8f 93 01 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 12 b0 10 00 48 00 00 00

b0: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

00:1f.3 SMBus [0c05]: Intel Corporation 82801JI (ICH10 Family) SMBus Controller [8086:3a30]

Subsystem: ASUSTeK Computer Inc. P5Q Deluxe Motherboard [1043:82d4]

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at f8a000000 (64-bit, non-prefetchable)

Region 4: I/O ports at 0400

00: 86 80 30 3a 03 00 80 02 00 00 05 0c 00 00 00 00

10: 04 00 00 8a 0f 00 00 00 00 00 00 00 00 00 00 00

20: 01 04 00 00 00 00 00 00 00 00 00 00 43 10 d4 82

30: 00 00 00 00 00 00 00 00 00 00 00 00 12 03 00 00

40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 86 0f 00 00 00 00 00 00

01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GK104 [GeForce GTX 670] [10de:1189] (rev a1) (prog-if 00 [VGA controller])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:2842]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at f8000000 (32-bit, non-prefetchable)

Region 1: Memory at f80000000 (64-bit, prefetchable)

Region 3: Memory at f88000000 (64-bit, prefetchable)

Region 5: I/O ports at ac00

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4071

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #1, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b4] Vendor Specific Information: Len=14 <?>

00: de 10 89 11 07 04 10 00 a1 00 00 03 00 00 80 00

10: 00 00 00 f8 0c 00 00 80 0f 00 00 00 0c 00 00 88

20: 0f 00 00 00 01 ac 00 00 00 00 00 00 62 14 42 28

30: 00 00 00 00 60 00 00 00 00 00 00 00 10 01 00 00

40: 62 14 42 28 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00

60: 01 68 03 00 08 00 00 00 05 78 81 00 00 00 e0 fe

70: 00 00 00 00 71 40 00 00 10 b4 02 00 e1 8d 64 00

80: 10 29 00 00 02 3d 45 01 00 01 81 10 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 13 00 00 00

a0: 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00

b0: 00 00 00 00 09 00 14 01 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01:00.1 Audio device [0403]: NVIDIA Corporation GK104 HDMI Audio Controller [10de:0e0a] (rev a1)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:2842]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin B routed to IRQ 17

Region 0: Memory at f9080000 (32-bit, non-prefetchable)

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4072

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #1, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: de 10 0a 0e 06 04 10 00 a1 00 03 04 08 00 80 00

10: 00 00 08 f9 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 42 28

30: 00 00 00 00 60 00 00 00 00 00 00 00 11 02 00 00

40: 62 14 42 28 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00

60: 01 68 03 00 08 00 00 00 05 78 81 00 00 00 e0 fe

70: 00 00 00 00 72 40 00 00 10 00 02 00 e1 8d 64 00

80: 10 29 00 00 02 3d 45 01 03 01 81 10 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 13 00 00 00

a0: 00 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

02:00.0 IDE interface [0101]: Marvell Technology Group Ltd. 88SE6111/6121 SATA II / PATA Controller [11ab:6121] (rev b1) (prog-if 8f [PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering])

Subsystem: Marvell Technology Group Ltd. 88SE6111/6121 1/2 port SATA II + 1 port PATA Controller [11ab:6121]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: I/O ports at bc00

Region 1: I/O ports at b880

Region 2: I/O ports at b800

Region 3: I/O ports at b480

Region 4: I/O ports at b400

Region 5: Memory at f9cffc00 (32-bit, non-prefetchable)

Capabilities: [48] Power Management version 2

Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4073

Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited

ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr+ NoSnoop-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <256ns, L1 unlimited

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

00: ab 11 21 61 07 00 10 00 b1 8f 01 01 08 00 00 00

10: 01 bc 00 00 81 b8 00 00 01 b8 00 00 81 b4 00 00

20: 01 b4 00 00 00 fc cf f9 00 00 00 00 ab 11 21 61

30: 00 00 00 00 48 00 00 00 00 00 00 00 10 01 00 00

40: 24 c9 c0 00 1f 80 00 00 01 50 02 5a 00 20 00 13

50: 05 e0 00 00 00 00 e0 fe 73 40 00 00 00 00 00 00

60: 50 c4 21 40 b0 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 10 00 11 00 c0 0f 08 00 00 24 08 00 11 a4 03 00

f0: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

03:00.0 Ethernet controller [0200]: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364] (rev 12)

Subsystem: ASUSTeK Computer Inc. Motherboard [1043:81f8]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 19

Region 0: Memory at f9dfc000 (64-bit, non-prefetchable)

Region 2: I/O ports at c800 [disabled]

Expansion ROM at f9dc0000 [disabled]

Capabilities: [48] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [50] Vital Product Data

Not readable

Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4074

Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 2048 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 unlimited

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

00: ab 11 64 43 06 04 10 00 12 00 00 02 08 00 00 00

10: 04 c0 df f9 00 00 00 00 01 c8 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 f8 81

30: 00 00 dc f9 48 00 00 00 00 00 00 00 13 01 00 00

40: 00 00 f0 01 00 80 a0 01 01 50 03 fe 00 20 00 13

50: 03 5c 00 80 00 00 00 01 00 00 00 01 05 e0 81 00

60: 00 00 e0 fe 00 00 00 00 74 40 00 00 00 00 00 00

70: 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 15 70 00 68 0b 00 0b 00 82 a8 e8 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 10 00 11 00 c0 8f 28 00 00 40 19 00 11 ac 07 00

f0: 08 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

04:00.0 Ethernet controller [0200]: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364] (rev 12)

Subsystem: ASUSTeK Computer Inc. Motherboard [1043:81f8]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 18

Region 0: Memory at f9efc000 (64-bit, non-prefetchable)

Region 2: I/O ports at d800 [disabled]

Expansion ROM at f9ec0000 [disabled]

Capabilities: [48] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [50] Vital Product Data

Not readable

Capabilities: [5c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4076

Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 2048 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 unlimited

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM L0s L1 Enabled; RCB 128 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

00: ab 11 64 43 06 04 10 00 12 00 00 02 08 00 00 00

10: 04 c0 ef f9 00 00 00 00 01 d8 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 f8 81

30: 00 00 ec f9 48 00 00 00 00 00 00 00 12 01 00 00

40: 00 00 f0 01 00 80 a0 01 01 50 03 fe 00 20 00 13

50: 03 5c 00 80 00 00 00 01 00 00 00 01 05 e0 81 00

60: 00 00 e0 fe 00 00 00 00 76 40 00 00 00 00 00 00

70: 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 15 70 00 68 0b 00 0b 00 82 a8 e8 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 10 00 11 00 c0 8f 28 00 00 40 19 00 11 ac 07 00

f0: 0b 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

05:00.0 Audio device [0403]: Creative Labs Sound Core3D [Sound Blaster Recon3D / Z-Series] [1102:0012] (rev 01)

Subsystem: Creative Labs SB1570 SB Audigy Fx [1102:0010]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 17

Region 0: Memory at f9ffc000 (64-bit, non-prefetchable)

Region 2: Memory at f9ff8000 (64-bit, non-prefetchable)

Capabilities: [40] Power Management version 3

Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [50] MSI: Enable+ Count=1/1 Maskable+ 64bit+

Address: 00000000fee00000 Data: 4075

Masking: 00000000 Pending: 00000000

Capabilities: [70] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <16us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: 02 11 12 00 06 04 10 00 01 00 03 04 08 00 00 00

10: 04 c0 ff f9 00 00 00 00 04 80 ff f9 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 02 11 10 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 11 01 00 00

40: 01 50 03 04 08 00 00 00 00 00 00 00 00 00 00 00

50: 05 70 81 01 00 00 e0 fe 00 00 00 00 75 40 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 10 00 02 00 00 80 28 00 10 20 09 00 11 3c 02 00

80: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 10 00 00 00 00 00 00 00 02 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

07:00.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [14f1:8800] (rev 05)

Subsystem: Hauppauge computer works Inc. Nova-S-Plus DVB-S [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (5000ns min, 13750ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fa000000 (32-bit, non-prefetchable)

Capabilities: [44] Vital Product Data

Not readable

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: f1 14 00 88 16 00 90 02 05 00 00 04 08 40 80 00

10: 00 00 00 fa 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 70 00 02 92

30: 00 00 00 00 44 00 00 00 00 00 00 00 10 01 14 37

40: 30 1f 1f 17 03 4c 00 00 00 00 00 00 01 00 22 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

07:00.1 Multimedia controller [0480]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port] [14f1:8801] (rev 05)

Subsystem: Hauppauge computer works Inc. Device [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (1000ns min, 63750ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fb000000 (32-bit, non-prefetchable)

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: f1 14 01 88 16 00 90 02 05 00 80 04 08 40 80 00

10: 00 00 00 fb 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 70 00 02 92

30: 00 00 00 00 4c 00 00 00 00 00 00 00 10 01 04 ff

40: 30 1f 1f 17 00 00 00 00 00 00 00 00 01 00 22 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

07:00.2 Multimedia controller [0480]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port] [14f1:8802] (rev 05)

Subsystem: Hauppauge computer works Inc. Device [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (1500ns min, 22000ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fc000000 (32-bit, non-prefetchable)

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: f1 14 02 88 16 00 90 02 05 00 80 04 08 40 80 00

10: 00 00 00 fc 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 70 00 02 92

30: 00 00 00 00 4c 00 00 00 00 00 00 00 10 01 06 58

40: 30 1f 1f 17 00 00 00 00 00 00 00 00 01 00 22 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

07:00.4 Multimedia controller [0480]: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [IR Port] [14f1:8804] (rev 05)

Subsystem: Hauppauge computer works Inc. Device [0070:9202]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (1500ns min, 63750ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at fd000000 (32-bit, non-prefetchable)

Capabilities: [4c] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: f1 14 04 88 16 00 90 02 05 00 80 04 08 40 80 00

10: 00 00 00 fd 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 70 00 02 92

30: 00 00 00 00 4c 00 00 00 00 00 00 00 10 01 06 ff

40: 30 1f 1f 17 00 00 00 00 00 00 00 00 01 00 22 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

07:03.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller [1106:3044] (rev c0) (prog-if 10 [OHCI])

Subsystem: ASUSTeK Computer Inc. Motherboard [1043:81fe]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (8000ns max), Cache Line Size: 32 bytes

Interrupt: pin A routed to IRQ 19

Region 0: Memory at fe000000 (32-bit, non-prefetchable)

Region 1: I/O ports at ec00 [disabled]

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 06 11 44 30 06 00 10 02 c0 10 00 0c 08 40 00 00

10: 00 00 00 fe 01 ec 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 fe 81

30: 00 00 00 00 50 00 00 00 00 00 00 00 13 01 00 20

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 00 02 e4 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Map view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci map (M).txt

00:00.0 Host bridge: Intel Corporation 4 Series Chipset DRAM Controller (rev 02)

00:06.0 PCI bridge: Intel Corporation 4 Series Chipset PCI Express Root Port (rev 02)

## 00.06:0 is a bridge from 00 to 01-01

00:1a.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4

00:1a.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5

00:1a.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6

00:1a.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2

00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 1

## 00.1c:0 is a bridge from 00 to 06-06

00:1c.1 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 2

## 00.1c:1 is a bridge from 00 to 05-05

00:1c.2 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 3

## 00.1c:2 is a bridge from 00 to 04-04

00:1c.3 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 4

## 00.1c:3 is a bridge from 00 to 03-03

00:1c.4 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Root Port 5

## 00.1c:4 is a bridge from 00 to 02-02

00:1d.0 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1

00:1d.1 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2

00:1d.2 USB controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3

00:1d.7 USB controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1

00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90)

## 00.1e:0 is a bridge from 00 to 07-07

00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller

00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller

00:1f.3 SMBus: Intel Corporation 82801JI (ICH10 Family) SMBus Controller

01:00.0 VGA compatible controller: NVIDIA Corporation GK104 [GeForce GTX 670] (rev a1)

01:00.1 Audio device: NVIDIA Corporation GK104 HDMI Audio Controller (rev a1)

02:00.0 IDE interface: Marvell Technology Group Ltd. 88SE6111/6121 SATA II / PATA Controller (rev b1)

03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller (rev 12)

04:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller (rev 12)

05:00.0 Audio device: Creative Labs Sound Core3D [Sound Blaster Recon3D / Z-Series] (rev 01)

07:00.0 Multimedia video controller: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder (rev 05)

07:00.1 Multimedia controller: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port] (rev 05)

07:00.2 Multimedia controller: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port] (rev 05)

07:00.4 Multimedia controller: Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [IR Port] (rev 05)

07:03.0 FireWire (IEEE 1394): VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller (rev c0)

Summary of buses:

00: Primary host bus

1e.0 Bridge to 07-07

1c.4 Bridge to 02-02

1c.3 Bridge to 03-03

1c.2 Bridge to 04-04

1c.1 Bridge to 05-05

1c.0 Bridge to 06-06

06.0 Bridge to 01-01

01: Entered via 00:06.0

02: Entered via 00:1c.4

03: Entered via 00:1c.3

04: Entered via 00:1c.2

05: Entered via 00:1c.1

07: Entered via 00:1e.0

Tree view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci tree (nnvvt).txt

-[0000:00]-+-00.0 Intel Corporation 4 Series Chipset DRAM Controller [8086:2e20]

+-06.0-[01]--+-00.0 NVIDIA Corporation GK104 [GeForce GTX 670] [10de:1189]

| \-00.1 NVIDIA Corporation GK104 HDMI Audio Controller [10de:0e0a]

+-1a.0 Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4 [8086:3a37]

+-1a.1 Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5 [8086:3a38]

+-1a.2 Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6 [8086:3a39]

+-1a.7 Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 [8086:3a3c]

+-1c.0-[06]--

+-1c.1-[05]----00.0 Creative Labs Sound Core3D [Sound Blaster Recon3D / Z-Series] [1102:0012]

+-1c.2-[04]----00.0 Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364]

+-1c.3-[03]----00.0 Marvell Technology Group Ltd. 88E8056 PCI-E Gigabit Ethernet Controller [11ab:4364]

+-1c.4-[02]----00.0 Marvell Technology Group Ltd. 88SE6111/6121 SATA II / PATA Controller [11ab:6121]

+-1d.0 Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1 [8086:3a34]

+-1d.1 Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2 [8086:3a35]

+-1d.2 Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3 [8086:3a36]

+-1d.7 Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1 [8086:3a3a]

+-1e.0-[07]--+-00.0 Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [14f1:8800]

| +-00.1 Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port] [14f1:8801]

| +-00.2 Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port] [14f1:8802]

| +-00.4 Conexant Systems, Inc. CX23880/1/2/3 PCI Video and Audio Decoder [IR Port] [14f1:8804]

| \-03.0 VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller [1106:3044]

+-1f.0 Intel Corporation 82801JIR (ICH10R) LPC Interface Controller [8086:3a16]

+-1f.2 Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller [8086:3a22]

\-1f.3 Intel Corporation 82801JI (ICH10 Family) SMBus Controller [8086:3a30]